摘要
在时序电路中,由于时序元件的存在,使测试生成问题复杂化。为了避免故障传播和状态确认的大计算量,对基于仿真的测试生成方法进行了探讨。由于逻辑仿真测试生成方法速度较快但故障覆盖率较低,而故障仿真测试生成方法速度较慢但故障覆盖率高,提出了一种基于混合仿真的测试生成方法。介绍了基于仿真的测试生成过程,给出了相关参数的设定,对测试生成过程中适应度函数的设计进行了深入研究。综合了逻辑仿真和故障仿真测试生成方法的优点,在故障覆盖率和测试生成时间上都取得了较好的效果,具有很好的应用前景。
Test generation problem is complex because of the sequential components in the sequential circuit. In order to avoid overmuch computation, the method based on simulation is researched. Since logic - simulation - based method is fast but with low percentage of coverage, while fault - simulation - based method is contrary, so a combina- tional - simulation - based method is proposed in this paper. The procedure of test generation based on simulation is introduced first, and then the setting of some parameters, at last the designation of fitness function are discussed in detail. The method proposed here has both the advantages of logic and fault simulation method, and has good effects on generation time and percentage of coverage. So it is a promising method in application.
出处
《计算机仿真》
CSCD
2008年第3期302-305,共4页
Computer Simulation
