摘要
在经典DPLL(数字锁相环)的基础上,提出了一种在中频过采样背景条件下利用过采样值进行相位捕捉和跟踪的新型数字锁相环。该方法利用两级鉴频器实现频率锁定,同时利用高频过采样实现数字锁相,对相位误差一步调整到位而不需连续多次调整。最后讨论了波形失真和随机抖动的影响;利用相对阈值法使性能得到很大改善。该方法解决了锁定精度和锁定时间不能同时兼顾以及抗干扰能力差等若干问题。
A new type of digital phase locked loop （ DPLL ） to capture and trace phase using the value of over sampling in intermediate frequency and over sampling based on traditional DPLL was presented. The method achieves locked frequency by two stages detect frequency device and digital locked phase by high frequency over sampling. The phase error was adjusted one time only with the new method, while it needs several times continuously with the traditional method. Finally, the effects on waveform distortion and random twitter were described, and their performances can be improved by relatively threshold. The method solves some difficult problems of lock precision and time not being given dual attention and bad anti-jamming of traditional DPLL.
出处
《微纳电子技术》
CAS
2008年第1期55-58,共4页
Micronanoelectronic Technology
基金
国家自然科学基金(60172028)
新世纪优秀人才基金资助课题(NCET-04-0947)
关键词
数字锁相环
数字鉴相器
环路滤波器
digital phase locked loop （DPLL）
digital phase discriminator
filter of loop
