摘要
在FPGA的设计生产过程中,FPGA的测试是一个至关重要的环节。分析了基于SRAM配置技术的FPGA的结构组成及FPGA的基本测试方法。针对6000门可编程资源的FPGA,提出了一种基于阵列和长线线与测试CLB以及采用总线测试开关矩阵相结合的方法。该方法较利用与门或门传递错误信息的所需测试配置次数减少了一半,从而加快了测试速度。
The FPGA test is a crucial step in the design and manufacture. Firstly, the structure of SRAM-based FPGA and popular testing methods were presented. A method of CLB （configurable logic block） test that was array-based and wired-and testing combined with the method for programmable interconnect test that is the bus-based testing were adopted for the testing of FPGA of 6000-gates programmable resources. Compared with the way using and-or gate to pass faults, the proposed method can reduce the programmable number by 50 % and speed up the FPGA test.
出处
《半导体技术》
CAS
CSCD
北大核心
2007年第9期804-808,共5页
Semiconductor Technology
