摘要
采用磁控三靶(Si,Sb及Te)共溅射法制备了Si掺杂Sb2Te3薄膜,作为对比,制备了Ge2Sb2Te5和Sb2Te3薄膜,并且采用微加工工艺制备了单元尺寸为10μm×10μm的存储器件原型来研究器件性能.研究表明,Si掺杂提高了Sb2Te3薄膜的晶化温度以及薄膜的晶态和非晶态电阻率,使得其非晶态与晶态电阻率之比达到106,提高了器件的电阻开/关比;同Ge2Sb2Te5薄膜相比,16at%Si掺杂Sb2Te3薄膜具有较低的熔点和更高的晶态电阻率,这有利于降低器件的RESET电流.研究还表明,采用16at%Si掺杂Sb2Te3薄膜作为存储介质的存储器器件原型具有记忆开关特性,可以在脉高3V、脉宽500ns的电脉冲下实现SET操作,在脉高4V、脉宽20ns的电脉冲下实现RESET操作,并能实现反复写/擦,而采用Ge2Sb2Te5薄膜的相同结构的器件不能实现RESET操作.
Silicon doped Sb2Te3 films were deposited by three target （Si, Sb and Te） co-sputtering. For comparison, Ge2Sb2Te5 and Sb2Te3 films were also prepared. Memory cells （pore size = 10 μm x 10 μm） were fabricated by micro-fabrication to further study their storage performance. Results indicate that silicon doping increases the crystallization temperature. Meanwhile, silicon doping drastically enhances the resistivity ratio （high resistance state/low resistance state） to 10^6 by increasing both amorphous resistivity and crystal resistivity so as to further increasing the ON/OFF ratio of memory cell. Compared with Ge2Sb2Te5 film, 16at%Si-Sb2Te3 film has a higher crystalline resistivity and lower melting temperature, which are helpful to the reduction of RESET current. Memory cell with silicon doped Sb2 Te3 film poccesses memory storage characteristics, and it can be reversibly switched between the high resistance state （RESET status） and the low resistance state （SET status）. The SET status can be triggered by electrical pulse of 3 V, 500 ns and it comes back to the RESET status when 4 V, 20 ns pulse is applied, while Ge2Sb2Tes cells, with the same structure can＇t be switched back to RESET state.
出处
《物理学报》
SCIE
EI
CAS
CSCD
北大核心
2007年第7期4224-4228,共5页
Acta Physica Sinica
基金
Silicon Storage Technology公司对本项目的经费支持.
