摘要
声纳阵信号模拟在声纳设计中起非常重要的作用．提出一种阵信号模拟算法．通过寻址一个标准信号表来产生不同频率及延时信号，利用模１加法反馈法产生噪声序列．该算法运行于一个双ＴＭＳ３２０Ｃ２５的并行流水线结构硬件平台上．实验证明设计是正确有效的．
Simulating array signal of sonar system plays very important roles in sonar design and sonar operator training, especially in digital sonar. An algorithm is presented in this paper for these purposes, in which the signal is simulated by addressing a standard signal table, and the pseudo-random white noise is generated by using the sum modulo 1 that can be realized with high speed DSP chips. The algorithm is calculated on a parallel pipeline architecture hardware platform which consists of two TMS320C25 chips, and several peripheral modules. The simulation of the system on computer and the hardware realization prove that the design is right and efficient.
出处
《中国科学院研究生院学报》
CAS
CSCD
1996年第2期196-208,共13页
Journal of the Graduate School of the Chinese Academy of Sciences
关键词
白噪声
声纳信号
模拟系统
数字信号处理器
parallel pipeline architecture, standard signal table, white noise,DSP
