摘要
提出了一种基于视频解码芯片ADV7183B和USB2.0总线技术的高速视频采集系统的设计方案,该方案利用FPGA实现视频数据流的收发时序,通过USB接口芯片CY7C68013与主机进行交互通信。本文详细介绍了该视频采集系统的硬件结构、软件设计和工作流程。
Design scheme of a high digital video capturing system based on ADV7183B and USB2.0 high speed bus technology was presented. The design scheme used FPGA to finish timing request, CY7C68013 communicate with the host by USB. in this paper , The hardware architecture and the software design were described in detail.
出处
《微计算机信息》
北大核心
2006年第10S期247-249,共3页
Control & Automation
基金
国家自然科学基金资助项目(60135020)
国家重点预研基金资助项目(413010702)
