摘要
设计研制了一款适用于数据通路的10万门容量的FPGA器件FDP100K(FDP:FPGA for Data-Path),其主要特点为:可编程逻辑单元结构不同于国际上已有的可编程逻辑单元结构,是一种新颖的基于查询表LUT和多路选择器MUX的混合结构;连线资源结构采用新颖的层次式布线结构,提供高度灵活的布线能力.芯片采用SM IC 0.35μm CMOS工艺,包含1024个可编程逻辑单元和128个可编程IO单元.芯片配合自主开发的软件系统FDE(FPGA Development Environment)进行测试,结果表明:FDP100K芯片的可编程逻辑单元功能正常;芯片的各种连线资源功能正常;可以准确地实现数据通路型电路和其他类型的电路的功能.
A novel 100,000-system-gate FPGA architecture FDP100K（FDP：FPGA for Data-Path） is proposed. It is designed for data-path application. The programmable logic cell for FDP100K is a new mixture logic block with LUT and MUX. The programmable interconnect for FDP100K is organized as a novel hierarchy structure. The chip has taped out with SMIC 0.35um CMOS process. It includes 1024 logic cells and 128 programmable IO cells. The chip FDP100K is tested by cooperating with its software system FDE（FDE：FPGA Development Environment）. The results show that all kinds of logic cells and interconnect resources work correctly and the chip can be used to download datapath circuits and other kinds of circuits correctly.
出处
《电子学报》
EI
CAS
CSCD
北大核心
2006年第8期1372-1375,共4页
Acta Electronica Sinica
基金
上海AM基金(No.0406)
国家863FPGA专项基金(No.2005AA1Z12305-2)
关键词
现场可编程逻辑器件
数据通路
可编程互连资源
可编程逻辑资源
field programmable logic device
data-path
programmable interconnect resource
programmable logic resource
