期刊文献+

并行采集系统通道失配误差测量及校正 被引量:3

Measurement and Calibration of Channel Mismatch Errors in Time-Interleaved ADC
在线阅读 下载PDF
导出
摘要 并行时间交替采样结构是一种有效地提高采样率的方法,但在采用此结构的采集系统中,多个ADC通道间的失配误差严重影响采集系统的性能,国内外对失配误差的测量和校正多采用加测试信号的方法。该文通过理论分析得出一种不需要测试信号且适用信号范围广泛的误差测量算法,并对国外文献中盲算法估计时间误差的方法进行了改进。计算机仿真证实了该方法对误差的估计有极高的精确度,能有效地提高采集系统性能。 The time-interleaved ADC structure is one way to increase the sampling rate. However, channel mismatch errors of this structure will increasingly degrade the performance of the whole system. For this reason, adding test signal is widely used when measuring and calibrating the mismatch errors. This paper propose a method which measure mismatches without the need of any special calibration signal and therefore has wide applications. Furthermore, the method of error estimation of blind algorithm is improved. The computer simulations show that the method estimates errors with high accuracy and can improve the performance of the system effectively.
出处 《电子科技大学学报》 EI CAS CSCD 北大核心 2006年第3期313-316,共4页 Journal of University of Electronic Science and Technology of China
关键词 时间交替 增益误差 偏置误差 时间误差 盲算法 time-interleaved gain errors time-skew errors offset errors blind algorithm
  • 相关文献

参考文献4

  • 1Black W C, Hedges D A. Time interleaved converter arrays[J]. IEEE J. Solid-State Circuits, 1980(15): 1022-1029.
  • 2Eklund J E, Gustafsson F G. Digital offset compensation of time-interleaved ADC using random chopper sampling[J]. IEEE international Symposium on Circuits and Systems, 2000, 3:447-450.
  • 3Elbomsson J, Eklund J E. Blind estimation of timing errors in interleaved AD converters[J]//ICASSP, 2001(6): 3913-3916.
  • 4兰军,宋千,周智敏.多通道并列数据采集系统非均匀采样校正[J].数据采集与处理,2000,15(3):340-344. 被引量:6

二级参考文献3

共引文献5

同被引文献33

  • 1张清洪,吕幼新,王洪,刘霖.多片ADC并行采集系统的误差时域测量与校正[J].电讯技术,2005,45(3):189-193. 被引量:12
  • 2林长青,孙胜利.基于FPGA的多路高速数据采集系统[J].电测与仪表,2005,42(5):52-54. 被引量:46
  • 3张贤达.矩阵分析与应用[M].北京:清华大学出版社,2006.
  • 4HUANG S,LEVY B C. Adaptive blind calibration of timing offset and gain mismatch for two-channel time- interleaved ADCs~J~. IEEE Transactions on Circuits and Systems, 2006,53 (6) : 1278-1288.
  • 5尹亮,周劼,姚军.多片ADC并行采集系统的增益误差补偿[J].现代电子技术,2007,30(17):170-171. 被引量:5
  • 6余建宇,罗丁利,陈矛.基于CORDIC算法的数字鉴频方法及其在FPGA中的实现[J].火控雷达技术,2007,36(3):72-77. 被引量:7
  • 7S.M.Jamal,Fu.Daihong,M.P.Singh,Calibration of sample-time error in a two-channel time-interleaved analog-to-digital converter[J].IEEE,2004.
  • 8J in H,Lee E K F.A digital2background calibrationtechnique for minimizing timing error effects in timeinterleaved ADCs[J].IEEE Trans on Circuits Systems,2000,47:603-613.
  • 9Pereira.J.M.D,Girao.P.M.B.S,Serra.A.M.C,An FFT-based method to evaluate and compensate gain and offseterrors of interleaved ADC systems[J].IEEE,2004.
  • 10Jamal SM,Fu D,SinghM P,et al.Calibrat ion of sample2t ime erro r in a two2channelt ime2interleavedanalog2to2digital converter[J].IEEE T rans on Cir2cuitsand System s2I:Regular Papers,2004,51(1):130-139.

引证文献3

二级引证文献9

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部