摘要
根据无人机系统对数据链路的高速率、低误码的需求,分析比较了QPSK数字中频解调与零中频解调2种方案。针对本系统的特点,采用FPGA及DSP设计实现了一种高速QPSK数字零中频解调器,同时简要分析了高速数字解调器的工作原理,并介绍了高速解调器的硬件与软件实现。
According to the requirement for data link＇ s high speed and low error rate of UAV system, we analyze and compare two methods of QPSK digital IF demodulation and zero - IF demodulation. We use FPGA and DSP to design and implement a high - speed QPSK digital zero- IF demodulator according to the characteristic of this system. We analyze the operation principle and the hardware/software implementation of the high - speed demodulator.
出处
《无线电工程》
2006年第5期47-49,共3页
Radio Engineering
