摘要
在倒装芯片应用中生长晶圆焊凸的工艺中对于间距较小(即小于150μm)、具有数个尺寸为150μm的焊凸,倒装前的焊锡涂敷好坏对产品的良率和可靠性起着重要作用。因为,如果涂敷的焊锡体积不均匀,就经不起涂敷过程中为确保涂敷在引线框上焊锡的完整和体积一致性而引入的强制视像系统检查,从而降低产出率。这就是一些组装工艺正设法减少或取消这些限制的原因。另一方面,采用直接熔化焊凸的方法来形成焊点是一种速度较快的工艺,但在保证回流处理后的离板高度方面有缺点,导致在温度和功率循环测试中的表现较差。介绍的采用铜接线柱焊凸(SolderBumponCopperStud;SBC)法解决了这些问题;对于那些需要倒装的组装工艺而言,这是可保障其制造性较佳的解决方案。介绍采用铜接线柱焊凸(SBC)工艺在附着在倒装芯片上的金属基片和焊凸之间形成焊点的新方法,利用铜接线柱焊凸技术再配合晶圆级的焊锡丝印工艺在半导体上预先形成焊凸。这是替代电镀焊凸工艺一种别具成本效益的方法。
There are several processes in growing solder bumps in a wafer intended for Flipchip applications. For small-pitch bumping, i.e.〈150μm, with several number of =150μm-sized bumps, solder dispensing on the leadframe substrate prior to Flipchip Attach is a major source of yield and reliability problem on the product if the dispensing results to non-uniform volume for the solder dots, not withstanding the prod uctivity loss during dispensing due to mandatory vision system monitors to ensure completeness and volume consistency of solder dispensed on the leadframe. It is the reason why some assemblies are trying to find ways to mitigate or eliminate these limitations. On the other hand, directly re-melting the bumps to form the joint is a faster process, but has its share of disadvantages in maintaining the stand-off height after reflow, which results to poor performance during Temperature and Power cycling tests. The Solder Bump on Copper stud （SBC） method defined in this paper resolved the problems mentioned and is a better solution to the manufacturability of assemblies requiring flip chip attach. This paper outlines a new method of forming a solder joint between a metal substrate and the bumps attached to the silicon in flip chip applications by solder bump on copper stud （SBC） process. This new method makes use of copper stud bumping5 technology coupled with solder screenprinting on wafer-level to pre-form the bumps on the silicon. This is a cost-effective alternative to electroplated bumps.
出处
《电子工业专用设备》
2006年第5期36-40,共5页
Equipment for Electronic Products Manufacturing
