摘要
结合现代导航技术发展的特点,设计了一种基于DSP的捷联惯性导航计算机。该导航计算机采用DSP+单片机的双CPU体系结构,DSP主要负责数据计算而单片机主要负责I/O操作。单片机与DSP共享DSP的总线和外部存储器,完成双CPU之间的数据交换。为避免单片机I/O操作时干扰DSP子系统,通过CPLD为单片机扩展双总线。
Combining the characteristic of the technical development of navigation, this paper designs a strapdown inertial navigation computer based on DSP. The navigation computer is with a dual CPU structure （ DSP and single - chip processor）. DSP is used to process the data while single - chip processor is to control the I/O operation. Single- chip processor shares DSPg bus and external memorizer to complete the exchange of data with DSP. In order to avoid single - chip processorg I/O operation interfering with DSP, CPLD extends dual bus for single -chip processor.
出处
《微处理机》
2006年第2期55-57,共3页
Microprocessors
