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一款高端数字SOC设计的系统级验证 被引量:1

System-level Verification of a High-end Digital SOC Design
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摘要 集成电路行业的发展,为SOC设计积累了丰富的IP库和设计方法。采用系统设计常用的基于平台的方法,可以快速完成系统的集成。但要完成对整个系统的验证,可能要占到整个设计周期70%以上的时间。而验证的方法是具有多样性的。该文以一款高端SOC的设计经历,简单描述了系统级验证过程,并以同步串联接口模块为例详细介绍了在系统级对RTL和门级网表的验证,以及验证所采用的特殊方法。 With the development of lC industry, there are many lPs and methodologies available for SOC design. Using platform-based design, a SOC can be integrated rapidly. But the whole verification process may need 70% design effort. There are many ways to verify the SOC, and every way has its own advantage. This paper based on experience of a SOC design describes the verification process of system level and a special method when no simulation model available.
作者 杜敏 王世明
出处 《计算机工程》 EI CAS CSCD 北大核心 2005年第21期198-200,共3页 Computer Engineering
关键词 SOC 系统验证 IP 验证环境 SOC System-level verification IP Verification environment
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