摘要
提出一种互补结构的寄存器电路设计方案,用于减小DES加密电路的差分功率信号,防御差分功耗分析.提出了一种误导攻击者的干扰电路,在保证加密电路安全等级的前提下,大幅度降低了电路的硬件开销.为节约成本与缩短设计周期,文中使用了一套高效的抗攻击电路的设计流程.
A complement register structure is proposed for a DES circuit. The structure can reduce the differential power signal of a DES circuit and lead to the failure of differential power analysis. A circuit design, which can mislead the attacker,is also presented. The circuit can ensure a high enough security level with reasonable area and power consumption. To save time and money,an effective design flow for an anti-attack circuit is also discussed.
基金
上海市重点实验室产学研基金(批准号:036511003)
集成电路设计创新基金SDC(批准号:037062016)
国家自然科学基金(批准号:90407002)资助项目~~
关键词
差分功耗分析
互补结构
抗攻击电路
DES
differential power analysis
complement strueture
anti-attack eircuit
DES
