期刊文献+

高性能嵌入式CPU特殊指令单元的设计与实现 被引量:3

Design and implementation of special instructions unit in high performance embedded CPU
在线阅读 下载PDF
导出
摘要 为了增强嵌入式 CPU处理复杂运算的能力,加入特殊指令———乘积累加指令 MAC和置换指令 PERM.MAC用于提高CPU执行数字信号处理运算的效率,PERM用于增强加密、解密的运算性能.在集成电路设计过程中,运用了硬件资源共享、完全流水线、时钟控制等技术,使得整个运算单元在不增加过多芯片面积的条件下达到高性能、低功耗的设计指标.采用这种设计,在进行信息安全、多媒体处理时可以大大提高CPU的运算效率. Some special instructions added to enhance the capability of processing complex calculation in embedded CPU were MAC (multiply accumulate) instruction, PERM (permutation) instruction, and four transport instructions to transport data. The MAC instruction was used to improve the efficiency of CPU in doing the DSP (digital signal processing) calculations, while the PERM to enhance the performance of encryption and decryption operations. They were designed in an independent functional unit in the CPU and they share hardware resources. High performance and low power design target were achieved without much increase in the chip area. It was shown that efficiency was improved greatly during processing information security or during multimedia calculation.
出处 《浙江大学学报(工学版)》 EI CAS CSCD 北大核心 2005年第2期211-215,共5页 Journal of Zhejiang University:Engineering Science
基金 国家"863"高技术研究发展计划资助项目(2002AA1Z1050)
关键词 嵌入式CPU 乘积累加 置换 Omega—Flip网络 WALLACE树 Digital signal processing Embedded systems Microprocessor chips VLSI circuits
  • 相关文献

参考文献10

  • 1KAMMER R G. Data encryption standard [EB/OL]. http://csrc.nist.gov/publications/fips/fips46-3/fips46-3.pdf,1999-10-25.
  • 2STELLING P F,OKLOBDZIJA V G. Implementing multiply-accumulate operation in multiplication time[EB/OL].http://computer.org/proceedings/arith/7846/78460099abs.htm,1999-12.
  • 3KAKKAR S. The R4640's "MAD" instruction yields huge performance improvement versus using "MULT"[EB/OL]. http://www.idt.com/pcms/tempDOCS/79R4640-AN-32344.pdf,2001-06.
  • 4YANG X,VACHHARAJANI M,LEE R B. Fast subword permutation instructions based on butterfly networks[A]. Proceedings of Media Processors 1999 IS&T/SPIE Symposium on Electric Imaging. Science and Technology [C].[s.t.]: PALMS, 2000: 80-86.
  • 5YANG X,LEE R B. Fast subword permutation instructions using omega and flip network stages [A]. Proceedings of the International Conference on Computer Design (ICCD 2000) [C].San Jose: [s.n.], 2000: 15-22.
  • 6LEE R B,SHI Z J,YANG X. How a processor can permute n bits in O(1) cycles [A]. Proceedings of Hot Chips 14. A Symposium on High Performance Chips[C].[s.t.]: Stanford University Press, 2002.
  • 7FERGUSON T. Multiplication and multiplier design[EB/OL]. http://www.csse.monash.edu.au/~timf/cse2102/ch4.pdf,2004-07-18.
  • 8RUTENBAR R A,CARLEY L R. Analysis and design of multiplier circuits for low power operation [EB/OL]. http://www.ece.cmu.edu/cssi/resbook/pdf/meier2.pdf,2000-07.
  • 9Carry save adder implementation [EB/OL]. http://elec-engr.okstate.edu/lgjohn/6263/lectures/csa.pdf,2000-05.
  • 10FLYNN M J. Integer multiplication [EB/OL]. http://www.stanford.edu/class/ee486/doc/lecture8.pdf,2003-01-27.

同被引文献37

引证文献3

二级引证文献6

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部