In this paper, a multi-functional development platform for flat panel display （FPD） development is proposed. With the proposed development platforms, a variety of FPD devices, including organic light-emitting diode ...In this paper, a multi-functional development platform for flat panel display （FPD） development is proposed. With the proposed development platforms, a variety of FPD devices, including organic light-emitting diode （OLED） screens, liquid crystal display （LCD） screens with touchscreens, OLED microdisplay screens, etc., can be directly and instantly connected, examined and utilized. A field-programmable gate array （FPGA） is used in the development system to drive different types of FPD devices, and ARM11S3C6410 is used as the application processor to provide various services. The development system uses Linux as the system kernel, Qt for Embedded Linux as the UI framework, various system libraries for video and audio services, and a custom-made user engine for fine-polished appearance and behavior. The development platform has been used not only in testing and verification of the FPD devices, but also in building OLED-powered handheld digital devices, shortening the development cycle from OLED devices to mature application products.展开更多
The paper puts forward a method on controlling the AM-OLED panel to display image with high gray scale levels. It also gives an ASIC design sample to implement this method. A twenty sub-fields scan scheme has been tak...The paper puts forward a method on controlling the AM-OLED panel to display image with high gray scale levels. It also gives an ASIC design sample to implement this method. A twenty sub-fields scan scheme has been taken into use in the chip to display 256 gray scale levels on a QVGA resolution AM-OLED display screen. The functions of image scaling and rotating have also been implemented for multiply application. The simulation and chip test result show that the chip design has met the design requirements.展开更多
It is an important problem that we implement floating point trigonometric functions of high precision with suitable hardware cost for high performance in digit image processing. The coordinate rotational digital compu...It is an important problem that we implement floating point trigonometric functions of high precision with suitable hardware cost for high performance in digit image processing. The coordinate rotational digital computer （CORDIC） arithmetic to is used to solve the above problem in this paper. In order to increase the speed of operation, it chooses the pipeline architecture. The results are disposed by IEEE-754 standard. The CORDIC architecture is modeled by using the verilog HDL and verified with MATLAB program and ModelSim 6.2SE tool. A 32 bits radix-2 CORDIC architecture was implemented on the available FPGA platform. The entire CORDIC architecture operated at 126.34 MHz of clock rate with a power consumption of 318.56 mW. Its theoretical background, procedures, simulation results and conclusions are presented in this paper.展开更多
Aiming at the time redundancy in the fiat panel display （FPD） imaging process, the paper studied some problems for FPD gray scale controlling based on the fraetal theory, dissertates the construction of the space-ti...Aiming at the time redundancy in the fiat panel display （FPD） imaging process, the paper studied some problems for FPD gray scale controlling based on the fraetal theory, dissertates the construction of the space-time mapping topology architecture, the proposition of optimal scanning structure for FPD＇s gray imaging, and the creation of the fractal theoretic model. Then the logic implementation and system application are presented based on the fraetal model of the optimal scan architecture, and the application results achieved target of eliminating time redundancy and increasing the scanning availability. The novel control mode that the fractal scanning IP core described with Verilog language embedded in the FPGA hardware frame can efficiently increase the imaging gray scales and quality in the FPDs scanning controller and speed up the frame frequency of display system.展开更多
MV10 is an MCU which consists of PWM, ADC,CAN and some other function blocks. It is designed for car body＇s control. Advanced peripheral bus （APB） is a low speed AMBA bus connecting low-power peripherals. This pape...MV10 is an MCU which consists of PWM, ADC,CAN and some other function blocks. It is designed for car body＇s control. Advanced peripheral bus （APB） is a low speed AMBA bus connecting low-power peripherals. This paper presents an implementation of APB interface for MV10 MCU. After that, MV10 can be integrated into any AMBA system on chips （SoCs） easily. We have built a multi-core system with ABMA to verify this design, In this system ARM9 is a main processor mounted on AHB and MV10 acts as a low-power and low-speed slaver on APB. Before building this system, some operations are encapsulated into a task with dedicated ID. MV10 works as a co-processor with ARM by acquiring task ID from ARM. The result of simulation indicates that MCU can work well as expected. Based on our design, MV10 can be mounted on any AMBA system from now on.展开更多
基金supported by the Key Laboratory of Advanced Display and System Application(Shanghai University),Ministry of Education,China(Grant No.P200803)the Postgraduate Innovation Foundation of Shanghai University(Grant No.SHUCX112372)
文摘In this paper, a multi-functional development platform for flat panel display （FPD） development is proposed. With the proposed development platforms, a variety of FPD devices, including organic light-emitting diode （OLED） screens, liquid crystal display （LCD） screens with touchscreens, OLED microdisplay screens, etc., can be directly and instantly connected, examined and utilized. A field-programmable gate array （FPGA） is used in the development system to drive different types of FPD devices, and ARM11S3C6410 is used as the application processor to provide various services. The development system uses Linux as the system kernel, Qt for Embedded Linux as the UI framework, various system libraries for video and audio services, and a custom-made user engine for fine-polished appearance and behavior. The development platform has been used not only in testing and verification of the FPD devices, but also in building OLED-powered handheld digital devices, shortening the development cycle from OLED devices to mature application products.
基金Project supported by the Science and Technology Commission of Shanghai Municipality(Grant No.09530708600)the Shanghai AM Foundation(Grant No.09700714000)
文摘The paper puts forward a method on controlling the AM-OLED panel to display image with high gray scale levels. It also gives an ASIC design sample to implement this method. A twenty sub-fields scan scheme has been taken into use in the chip to display 256 gray scale levels on a QVGA resolution AM-OLED display screen. The functions of image scaling and rotating have also been implemented for multiply application. The simulation and chip test result show that the chip design has met the design requirements.
基金supported by the Shanghai AM Foundation(Grant No.09700714000)
文摘It is an important problem that we implement floating point trigonometric functions of high precision with suitable hardware cost for high performance in digit image processing. The coordinate rotational digital computer （CORDIC） arithmetic to is used to solve the above problem in this paper. In order to increase the speed of operation, it chooses the pipeline architecture. The results are disposed by IEEE-754 standard. The CORDIC architecture is modeled by using the verilog HDL and verified with MATLAB program and ModelSim 6.2SE tool. A 32 bits radix-2 CORDIC architecture was implemented on the available FPGA platform. The entire CORDIC architecture operated at 126.34 MHz of clock rate with a power consumption of 318.56 mW. Its theoretical background, procedures, simulation results and conclusions are presented in this paper.
基金supported by the Key Laboratory of Advanced Display and System Applications(Shanghai University),Ministry of Education,China(Grant No.P200803)the Science and Technology Commission of Shanghai Municipality(Grant No.09ZR1412000)
文摘Aiming at the time redundancy in the fiat panel display （FPD） imaging process, the paper studied some problems for FPD gray scale controlling based on the fraetal theory, dissertates the construction of the space-time mapping topology architecture, the proposition of optimal scanning structure for FPD＇s gray imaging, and the creation of the fractal theoretic model. Then the logic implementation and system application are presented based on the fraetal model of the optimal scan architecture, and the application results achieved target of eliminating time redundancy and increasing the scanning availability. The novel control mode that the fractal scanning IP core described with Verilog language embedded in the FPGA hardware frame can efficiently increase the imaging gray scales and quality in the FPDs scanning controller and speed up the frame frequency of display system.
基金supported by the IC Special Foundation of Science and Technology Commission of Shanghai Municipality(Grant No.09706201300)the Shanghai Municipal Commission of Economic and Information(Grant No.090344)the Shanghai High-Technology Industrialization of New Energy Vehicles(Grant No.09625029)
文摘MV10 is an MCU which consists of PWM, ADC,CAN and some other function blocks. It is designed for car body＇s control. Advanced peripheral bus （APB） is a low speed AMBA bus connecting low-power peripherals. This paper presents an implementation of APB interface for MV10 MCU. After that, MV10 can be integrated into any AMBA system on chips （SoCs） easily. We have built a multi-core system with ABMA to verify this design, In this system ARM9 is a main processor mounted on AHB and MV10 acts as a low-power and low-speed slaver on APB. Before building this system, some operations are encapsulated into a task with dedicated ID. MV10 works as a co-processor with ARM by acquiring task ID from ARM. The result of simulation indicates that MCU can work well as expected. Based on our design, MV10 can be mounted on any AMBA system from now on.
