The implementation of the coordinate rotational digital computer （CORDIC） algorithm with wave pipelining technique on field programmable gate array （FPGA） is described. All data in FPGA-based wave pipelining pass ...The implementation of the coordinate rotational digital computer （CORDIC） algorithm with wave pipelining technique on field programmable gate array （FPGA） is described. All data in FPGA-based wave pipelining pass through a number of logic gates, in the same way that all data pass through the same number of registers in a conventional pipeline. Moreover, all paths are routed using identical routing resources. The manual placement, timing driven routing and timing analyzing techniques are applied to optimize the layout for achieving good path balance. Experimental results show that a 256-LUT logic depth circuit mapped on XC4VLX15-12 runs as high as 330 MHz, whichis a little lower than the speed of 336 MHz based on the conventional 16-stage pipelining in the same chip. The latency of the wave pipelining circuit is 30.3 ns, which is 36.4% shorter than the latency of 16-stage conventional pipelining circuit.展开更多
As an important part of lifeline engineering in the development and utilization of marine resources, the submarine fluid-filled pipeline is a complex coupling system which is subjected to both internal and external fl...As an important part of lifeline engineering in the development and utilization of marine resources, the submarine fluid-filled pipeline is a complex coupling system which is subjected to both internal and external flow fields. By utilizing Kennard＇s shell equations and combining with Helmholtz equations of flow field, the coupling equations of submarine fluid-filled pipeline for n=0 axisymmetrical wave motion are set up. Analytical expressions of wave speed are obtained for both s=1 and s=2 waves, which correspond to a fluid-dominated wave and an axial shell wave, respectively. The numerical results for wave speed and wave attenuation are obtained and discussed subsequently. It shows that the frequency depends on phase velocity, and the attenuation of this mode depends strongly on material parameters of the pipe and the internal and the external fluid fields. The characteristics of PVC pipe are studied for a comparison. The effects of shell thickness/radius ratio and density of the contained fluid on the model are also discussed. The study provides a theoretical basis and helps to accurately predict the situation of submarine pipelines, which also has practical application prospect in the field of pipeline leakage detection.展开更多
This paper describes a maximum time difference pipelined arithmetic chip,the 36-bit adder and subtractor based on 1.5 μm CMOS gate array The chipcan operate at 60MHz, and consumes less than 0.5Wat. The results are al...This paper describes a maximum time difference pipelined arithmetic chip,the 36-bit adder and subtractor based on 1.5 μm CMOS gate array The chipcan operate at 60MHz, and consumes less than 0.5Wat. The results are alsostudied, and a more precise model of delay time dmerence is proposed.展开更多
文摘The implementation of the coordinate rotational digital computer （CORDIC） algorithm with wave pipelining technique on field programmable gate array （FPGA） is described. All data in FPGA-based wave pipelining pass through a number of logic gates, in the same way that all data pass through the same number of registers in a conventional pipeline. Moreover, all paths are routed using identical routing resources. The manual placement, timing driven routing and timing analyzing techniques are applied to optimize the layout for achieving good path balance. Experimental results show that a 256-LUT logic depth circuit mapped on XC4VLX15-12 runs as high as 330 MHz, whichis a little lower than the speed of 336 MHz based on the conventional 16-stage pipelining in the same chip. The latency of the wave pipelining circuit is 30.3 ns, which is 36.4% shorter than the latency of 16-stage conventional pipelining circuit.
基金financially supported by the National Natural Science Foundation of China(Grant No.50905036)
文摘As an important part of lifeline engineering in the development and utilization of marine resources, the submarine fluid-filled pipeline is a complex coupling system which is subjected to both internal and external flow fields. By utilizing Kennard＇s shell equations and combining with Helmholtz equations of flow field, the coupling equations of submarine fluid-filled pipeline for n=0 axisymmetrical wave motion are set up. Analytical expressions of wave speed are obtained for both s=1 and s=2 waves, which correspond to a fluid-dominated wave and an axial shell wave, respectively. The numerical results for wave speed and wave attenuation are obtained and discussed subsequently. It shows that the frequency depends on phase velocity, and the attenuation of this mode depends strongly on material parameters of the pipe and the internal and the external fluid fields. The characteristics of PVC pipe are studied for a comparison. The effects of shell thickness/radius ratio and density of the contained fluid on the model are also discussed. The study provides a theoretical basis and helps to accurately predict the situation of submarine pipelines, which also has practical application prospect in the field of pipeline leakage detection.
文摘This paper describes a maximum time difference pipelined arithmetic chip,the 36-bit adder and subtractor based on 1.5 μm CMOS gate array The chipcan operate at 60MHz, and consumes less than 0.5Wat. The results are alsostudied, and a more precise model of delay time dmerence is proposed.
