This paper analyzed the reliability and put forward the reliability index of overload protection for moulded case circuit breaker. The success rate was adopted as its reliability index of overload protection. Based on...This paper analyzed the reliability and put forward the reliability index of overload protection for moulded case circuit breaker. The success rate was adopted as its reliability index of overload protection. Based on the reliability index and the reli- ability level, the reliability examination plan was analyzed and a test device for the overload protection of moulded case cir- cuit-breaker was developed. In the reliability test of overload protection, two power sources were used, which reduced the time of conversion and regulation between two different test currents in the overload protection test, which made the characteristic test more accurate. The test device was designed on the base of a Windows system, which made its operation simple and friendly.展开更多
This paper outlines the significance of enhancing the instantaneous protection reliability of low voltage circuit breakers and describes their main failure modes. The instantaneous failure mechanism of low voltage cir...This paper outlines the significance of enhancing the instantaneous protection reliability of low voltage circuit breakers and describes their main failure modes. The instantaneous failure mechanism of low voltage circuit breakers was analyzed so that measures to improve instantaneous protection reliability can be determined. Furthermore, the theory of the instantaneous characteristics calibration device for low voltage circuit breakers and the method of eliminating the non-periodic component of test current are given in detail. Finally, the test results are presented.展开更多
This paper proposes a redundant network communication structure for the patient integrated circuit(IC)card payment system in a hospital information system(HIS),compares it with the network structure of normal hospital...This paper proposes a redundant network communication structure for the patient integrated circuit(IC)card payment system in a hospital information system(HIS),compares it with the network structure of normal hospital IC card system,and calculates the reliabilities of the related communications like the RS485communication and the Ethernet communication.The new structure can efectively promote the reliability of the hospital operation and ensure the payment collection when the Ethernet network is broken.The system is applied to a local hospital and the cost-performance rate is satisfactory during the application.展开更多
Interconnect reliability has been regarded as a discipline that must be seriously taken into account from the early design phase of integrated circuit (IC). In order to study the status and trend of the interconnect r...Interconnect reliability has been regarded as a discipline that must be seriously taken into account from the early design phase of integrated circuit (IC). In order to study the status and trend of the interconnect reliability, a comprehensive review of the published literatures is carried out. This can depict the global trend of ICs’ interconnect reliability and help the new entrants to understand the present situation of this area.展开更多
The dynamic avalanche effect is a critical factor influencing the performance and reliability of the field-stop insulated gate bipolar transistors(FS-IGBT).Unclamped inductive switching(UIS)is the primary method for t...The dynamic avalanche effect is a critical factor influencing the performance and reliability of the field-stop insulated gate bipolar transistors(FS-IGBT).Unclamped inductive switching(UIS)is the primary method for testing the dynamic avalanche capability of FS-IGBTs.Numerous studies have demonstrated that factors such as device structure,avalanche-generating current filaments,and electrical parameters influence the dynamic avalanche effect of the FS-IGBT.However,few studies have focused on enhancing the avalanche reliability of the FS-IGBT by adjusting circuit parameters during operation.In this paper,the dynamic avalanche effect of the FS-IGBT under UIS conditions is comprehensively investigated through a series of comparative experiments with varying circuit parameters,including bus voltage V_(DC),gate voltage V_(G),gate resistance R_(g),load inductance L,and temperature TC.Furthermore,a method to enhance the dynamic avalanche reliability of the FS-IGBT under UIS by optimizing circuit parameters is proposed.In practical applications,reducing gate voltage,increasing load inductance,and lowering temperature can effectively improve the dynamic avalanche capability of the FS-IGBT.展开更多
The advantages of the all-fiber optical current transformer include but are not limited to being small in size,having no magnetic saturation,exhibiting high measurement accuracy,and boasting strong electromagnetic int...The advantages of the all-fiber optical current transformer include but are not limited to being small in size,having no magnetic saturation,exhibiting high measurement accuracy,and boasting strong electromagnetic interference resistance.However,the high cost of the all-fiber optical transformer limits its promotion and application in engineering.This paper proposes a design scheme of an independent double acquisition loop for the all-fiber optical current transformer based on the single optical path.Firstly,based on the closed-loop control mode and open-loop control mode,the twochannel sampling signal demand for relay protection,and the independent dual-acquisition loop design scheme of the all-fiber optical current transformer are proposed.Secondly,the reliability and economic feasibility of the scheme are demonstrated by an analysis of system failure and cost.The results show that the scheme can actualize the acquisition function of two independent all-fiber optical current transformer products on a single all-fiber current transformer in an integrated manner,which greatly reduces the cost of the all-fiber optical current transformer in engineering applications.展开更多
The structure of the extended gate ion sensitive field effect transistor (EGISFET) is similar to the structure of the ion sensitive field effect transistor (ISFET).Moreover,the non-ideal effect of EGISFET is the mai...The structure of the extended gate ion sensitive field effect transistor (EGISFET) is similar to the structure of the ion sensitive field effect transistor (ISFET).Moreover,the non-ideal effect of EGISFET is the main impediment to development of commercial processes for sensitive devices.It is necessary to promote the stability and reliability of the devices by employing calibration circuits and the better fabrication conditions.The temporal drift exists in the entire measurement experiment. Furthermore,in this study we can reduce the temporal drift effect which influences the stability of the TiN sensitive electrode with the differential front-end offset circuit.The measurement system combines with shifting circuit,differential and instrument amplifiers.We employ the calibration circuit to compare with the variations of the output voltage,and expectably improve the stability and reliability of the TiN sensitive electrode by the novel calibration circuit.展开更多
In many areas, reliability of the digital circuits has become the key factor to restrict circuit development. Fault-tolerant design is the commonly used method to improve the reliability of digital circuits. The curre...In many areas, reliability of the digital circuits has become the key factor to restrict circuit development. Fault-tolerant design is the commonly used method to improve the reliability of digital circuits. The current fault-tolerant design methods are based on triple modular redundancy( TMR) or multiple modular redundancy( MMR). These redundancy designs rely on the experience of the designers,and the designed circuits have poor adaptabilities to a complex environment. However, evolutionary design of digital circuits does not rely on prior knowledge. During the evolution, some novel and optimal circuit topologies can be found, and the evolved circuits can feature strong adaptive capacities. Based on Cartesian genetic programming( CGP), a novel method for designing fault-tolerant digital circuits by evolution is proposed,key steps of the evolution are introduced,influences of function sets on evolution are investigated,and as a preliminary result,an evolved full adder with high fault-tolerance is shown.展开更多
As semiconductor manufacturing migrates to more advanced technology nodes, accelerated aging effect for nanoscale devices poses as a key challenge for designers to find countermeasures that effectively mitigate the de...As semiconductor manufacturing migrates to more advanced technology nodes, accelerated aging effect for nanoscale devices poses as a key challenge for designers to find countermeasures that effectively mitigate the degradation and prolong system's lifetime. Negative Bias Temperature Instability (NBTI) is emerging as one of the major reliability concerns. Two software tools for NBTI analyzing are proposed in this paper, one for transistor-level, and the other for gate-level. The transistor-level can be used to estimate the delay degradation due to NBTI effect very accurately, while the gate-level can be used for repeat analysis in circuit optimization because of its fast computing speed.展开更多
A split-gate SiC trench gate MOSFET with stepped thick oxide, source-connected split-gate(SG), and p-type pillar(ppillar) surrounded thick oxide shielding region(GSDP-TMOS) is investigated by Silvaco TCAD simulations....A split-gate SiC trench gate MOSFET with stepped thick oxide, source-connected split-gate(SG), and p-type pillar(ppillar) surrounded thick oxide shielding region(GSDP-TMOS) is investigated by Silvaco TCAD simulations. The sourceconnected SG region and p-pillar shielding region are introduced to form an effective two-level shielding, which reduces the specific gate–drain charge(Q_(gd,sp)) and the saturation current, thus reducing the switching loss and increasing the short-circuit capability. The thick oxide that surrounds a p-pillar shielding region efficiently protects gate oxide from being damaged by peaked electric field, thereby increasing the breakdown voltage(BV). Additionally, because of the high concentration in the n-type drift region, the electrons diffuse rapidly and the specific on-resistance(Ron,sp) becomes smaller.In the end, comparing with the bottom p~+ shielded trench MOSFET(GP-TMOS), the Baliga figure of merit(BFOM,BV~2/R_(on,sp)) is increased by 169.6%, and the high-frequency figure of merit(HF-FOM, R_(on,sp) × Q_(gd,sp)) is improved by310%, respectively.展开更多
Through the reliability analysis on transmission and transformation facilities with 220 kV or above voltage level in China in 2010, particularly by investigating the planned and unplanned outage of transformers, circu...Through the reliability analysis on transmission and transformation facilities with 220 kV or above voltage level in China in 2010, particularly by investigating the planned and unplanned outage of transformers, circuit breakers and overhead transmission lines with 220 kV, 330 kV and 500 kV level, the weak parts that may influence the operational reliabilities are figured out from technical and liability causes. Moreover, through the research on the device models and comparison of performance indices between domestic and imported devices, the trend of the reliability changes are identified so that the references can be provided for power enterprises to determine corresponding effective reliability measures during planning, design, implementation and production stages.展开更多
基金Project (No. E2005000039) supported by the Natural Science Foun-dation of Hebei Province, China
文摘This paper analyzed the reliability and put forward the reliability index of overload protection for moulded case circuit breaker. The success rate was adopted as its reliability index of overload protection. Based on the reliability index and the reli- ability level, the reliability examination plan was analyzed and a test device for the overload protection of moulded case cir- cuit-breaker was developed. In the reliability test of overload protection, two power sources were used, which reduced the time of conversion and regulation between two different test currents in the overload protection test, which made the characteristic test more accurate. The test device was designed on the base of a Windows system, which made its operation simple and friendly.
基金Project (No. 043804411) supported by the Tianjin Natural ScienceFoundation, China
文摘This paper outlines the significance of enhancing the instantaneous protection reliability of low voltage circuit breakers and describes their main failure modes. The instantaneous failure mechanism of low voltage circuit breakers was analyzed so that measures to improve instantaneous protection reliability can be determined. Furthermore, the theory of the instantaneous characteristics calibration device for low voltage circuit breakers and the method of eliminating the non-periodic component of test current are given in detail. Finally, the test results are presented.
基金the National Natural Science Foundation of China(No.81170507)the Project of Shanghai Committee of Science and Technology(Nos.11140903700 and 12142201200)
文摘This paper proposes a redundant network communication structure for the patient integrated circuit(IC)card payment system in a hospital information system(HIS),compares it with the network structure of normal hospital IC card system,and calculates the reliabilities of the related communications like the RS485communication and the Ethernet communication.The new structure can efectively promote the reliability of the hospital operation and ensure the payment collection when the Ethernet network is broken.The system is applied to a local hospital and the cost-performance rate is satisfactory during the application.
文摘Interconnect reliability has been regarded as a discipline that must be seriously taken into account from the early design phase of integrated circuit (IC). In order to study the status and trend of the interconnect reliability, a comprehensive review of the published literatures is carried out. This can depict the global trend of ICs’ interconnect reliability and help the new entrants to understand the present situation of this area.
基金supported in part by the National Natural Science Foundation of China under Grant 62071073in part by the Fundamental Research Funds for Central Universities under Grant 2023CDJXY-041in part by the Foundation from Guangxi Key Laboratory of Optoelectronic Information Processing under Grant GD20201.
文摘The dynamic avalanche effect is a critical factor influencing the performance and reliability of the field-stop insulated gate bipolar transistors(FS-IGBT).Unclamped inductive switching(UIS)is the primary method for testing the dynamic avalanche capability of FS-IGBTs.Numerous studies have demonstrated that factors such as device structure,avalanche-generating current filaments,and electrical parameters influence the dynamic avalanche effect of the FS-IGBT.However,few studies have focused on enhancing the avalanche reliability of the FS-IGBT by adjusting circuit parameters during operation.In this paper,the dynamic avalanche effect of the FS-IGBT under UIS conditions is comprehensively investigated through a series of comparative experiments with varying circuit parameters,including bus voltage V_(DC),gate voltage V_(G),gate resistance R_(g),load inductance L,and temperature TC.Furthermore,a method to enhance the dynamic avalanche reliability of the FS-IGBT under UIS by optimizing circuit parameters is proposed.In practical applications,reducing gate voltage,increasing load inductance,and lowering temperature can effectively improve the dynamic avalanche capability of the FS-IGBT.
基金supported by the National Natural Science Foundation of China (No. U1866203)
文摘The advantages of the all-fiber optical current transformer include but are not limited to being small in size,having no magnetic saturation,exhibiting high measurement accuracy,and boasting strong electromagnetic interference resistance.However,the high cost of the all-fiber optical transformer limits its promotion and application in engineering.This paper proposes a design scheme of an independent double acquisition loop for the all-fiber optical current transformer based on the single optical path.Firstly,based on the closed-loop control mode and open-loop control mode,the twochannel sampling signal demand for relay protection,and the independent dual-acquisition loop design scheme of the all-fiber optical current transformer are proposed.Secondly,the reliability and economic feasibility of the scheme are demonstrated by an analysis of system failure and cost.The results show that the scheme can actualize the acquisition function of two independent all-fiber optical current transformer products on a single all-fiber current transformer in an integrated manner,which greatly reduces the cost of the all-fiber optical current transformer in engineering applications.
文摘The structure of the extended gate ion sensitive field effect transistor (EGISFET) is similar to the structure of the ion sensitive field effect transistor (ISFET).Moreover,the non-ideal effect of EGISFET is the main impediment to development of commercial processes for sensitive devices.It is necessary to promote the stability and reliability of the devices by employing calibration circuits and the better fabrication conditions.The temporal drift exists in the entire measurement experiment. Furthermore,in this study we can reduce the temporal drift effect which influences the stability of the TiN sensitive electrode with the differential front-end offset circuit.The measurement system combines with shifting circuit,differential and instrument amplifiers.We employ the calibration circuit to compare with the variations of the output voltage,and expectably improve the stability and reliability of the TiN sensitive electrode by the novel calibration circuit.
基金National Natural Science Foundations of China(Nos.61271153,61372039)
文摘In many areas, reliability of the digital circuits has become the key factor to restrict circuit development. Fault-tolerant design is the commonly used method to improve the reliability of digital circuits. The current fault-tolerant design methods are based on triple modular redundancy( TMR) or multiple modular redundancy( MMR). These redundancy designs rely on the experience of the designers,and the designed circuits have poor adaptabilities to a complex environment. However, evolutionary design of digital circuits does not rely on prior knowledge. During the evolution, some novel and optimal circuit topologies can be found, and the evolved circuits can feature strong adaptive capacities. Based on Cartesian genetic programming( CGP), a novel method for designing fault-tolerant digital circuits by evolution is proposed,key steps of the evolution are introduced,influences of function sets on evolution are investigated,and as a preliminary result,an evolved full adder with high fault-tolerance is shown.
基金Supported by the National Key Technological Program of China (No.2008ZX01035-001)the National Natural Sci-ence Foundation of China (No.60870001)TNList Cross-discipline Fundation
文摘As semiconductor manufacturing migrates to more advanced technology nodes, accelerated aging effect for nanoscale devices poses as a key challenge for designers to find countermeasures that effectively mitigate the degradation and prolong system's lifetime. Negative Bias Temperature Instability (NBTI) is emerging as one of the major reliability concerns. Two software tools for NBTI analyzing are proposed in this paper, one for transistor-level, and the other for gate-level. The transistor-level can be used to estimate the delay degradation due to NBTI effect very accurately, while the gate-level can be used for repeat analysis in circuit optimization because of its fast computing speed.
基金the National Natural Science Foundation of China (Grant Nos. 61774052 and 61904045)the National Research and Development Program for Major Research Instruments of China (Grant No. 62027814)the Natural Science Foundation of Jiangxi Province, China (Grant No. 20212BAB214047)。
文摘A split-gate SiC trench gate MOSFET with stepped thick oxide, source-connected split-gate(SG), and p-type pillar(ppillar) surrounded thick oxide shielding region(GSDP-TMOS) is investigated by Silvaco TCAD simulations. The sourceconnected SG region and p-pillar shielding region are introduced to form an effective two-level shielding, which reduces the specific gate–drain charge(Q_(gd,sp)) and the saturation current, thus reducing the switching loss and increasing the short-circuit capability. The thick oxide that surrounds a p-pillar shielding region efficiently protects gate oxide from being damaged by peaked electric field, thereby increasing the breakdown voltage(BV). Additionally, because of the high concentration in the n-type drift region, the electrons diffuse rapidly and the specific on-resistance(Ron,sp) becomes smaller.In the end, comparing with the bottom p~+ shielded trench MOSFET(GP-TMOS), the Baliga figure of merit(BFOM,BV~2/R_(on,sp)) is increased by 169.6%, and the high-frequency figure of merit(HF-FOM, R_(on,sp) × Q_(gd,sp)) is improved by310%, respectively.
文摘Through the reliability analysis on transmission and transformation facilities with 220 kV or above voltage level in China in 2010, particularly by investigating the planned and unplanned outage of transformers, circuit breakers and overhead transmission lines with 220 kV, 330 kV and 500 kV level, the weak parts that may influence the operational reliabilities are figured out from technical and liability causes. Moreover, through the research on the device models and comparison of performance indices between domestic and imported devices, the trend of the reliability changes are identified so that the references can be provided for power enterprises to determine corresponding effective reliability measures during planning, design, implementation and production stages.
