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A pipelining task offloading strategy via delay-aware multi-agent reinforcement learning in Cybertwin-enabled 6G network
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作者 Haiwen Niu Luhan Wang +3 位作者 Keliang Du Zhaoming Lu Xiangming Wen Yu Liu 《Digital Communications and Networks》 2025年第1期92-105,共14页
Cybertwin-enabled 6th Generation(6G)network is envisioned to support artificial intelligence-native management to meet changing demands of 6G applications.Multi-Agent Deep Reinforcement Learning(MADRL)technologies dri... Cybertwin-enabled 6th Generation(6G)network is envisioned to support artificial intelligence-native management to meet changing demands of 6G applications.Multi-Agent Deep Reinforcement Learning(MADRL)technologies driven by Cybertwins have been proposed for adaptive task offloading strategies.However,the existence of random transmission delay between Cybertwin-driven agents and underlying networks is not considered in related works,which destroys the standard Markov property and increases the decision reaction time to reduce the task offloading strategy performance.In order to address this problem,we propose a pipelining task offloading method to lower the decision reaction time and model it as a delay-aware Markov Decision Process(MDP).Then,we design a delay-aware MADRL algorithm to minimize the weighted sum of task execution latency and energy consumption.Firstly,the state space is augmented using the lastly-received state and historical actions to rebuild the Markov property.Secondly,Gate Transformer-XL is introduced to capture historical actions'importance and maintain the consistent input dimension dynamically changed due to random transmission delays.Thirdly,a sampling method and a new loss function with the difference between the current and target state value and the difference between real state-action value and augmented state-action value are designed to obtain state transition trajectories close to the real ones.Numerical results demonstrate that the proposed methods are effective in reducing reaction time and improving the task offloading performance in the random-delay Cybertwin-enabled 6G networks. 展开更多
关键词 Cybertwin Multi-Agent Deep Reinforcement Learning(MADRL) Task offloading pipelining Delay-aware
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FPGA Implementation of Wave Pipelining CORDIC Algorithms 被引量:1
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作者 崔嵬 《Journal of Beijing Institute of Technology》 EI CAS 2008年第1期76-80,共5页
The implementation of the coordinate rotational digital computer (CORDIC) algorithm with wave pipelining technique on field programmable gate array (FPGA) is described. All data in FPGA-based wave pipelining pass ... The implementation of the coordinate rotational digital computer (CORDIC) algorithm with wave pipelining technique on field programmable gate array (FPGA) is described. All data in FPGA-based wave pipelining pass through a number of logic gates, in the same way that all data pass through the same number of registers in a conventional pipeline. Moreover, all paths are routed using identical routing resources. The manual placement, timing driven routing and timing analyzing techniques are applied to optimize the layout for achieving good path balance. Experimental results show that a 256-LUT logic depth circuit mapped on XC4VLX15-12 runs as high as 330 MHz, whichis a little lower than the speed of 336 MHz based on the conventional 16-stage pipelining in the same chip. The latency of the wave pipelining circuit is 30.3 ns, which is 36.4% shorter than the latency of 16-stage conventional pipelining circuit. 展开更多
关键词 wave pipelining coordinate rotational digital computer(CORDIC) algorithm pipeline latency path balance performance comparison
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Variation of yield stress of Daqing crude oil with pipelining history
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作者 李立 侯磊 孙立新 《Journal of Central South University》 SCIE EI CAS 2008年第S1期322-325,共4页
The yield stress of waxy crude oil is a fundamental parameter in the calculation of pipelining technique and analysis of flow safety for the heated oil transported through pipeline.Daqing crude oil was studied and the... The yield stress of waxy crude oil is a fundamental parameter in the calculation of pipelining technique and analysis of flow safety for the heated oil transported through pipeline.Daqing crude oil was studied and the variation of yield stress with shear history was explored through simulation experiment of pipelining.It is found that the effect of throughput variation or shear rate on yield stress is not obvious.With the decrease of final dynamic cooling temperature,the yield stress of waxy crude oil decreases,but there exists a little increase at the beginning.The prediction model of yield stress for waxy crude oil under the condition of shutdown is developed and it can be used to predict the yield stress of Daqing crude oil at certain heating temperature,final dynamic cooling temperature and measurement temperature.For the 139 groups of yield stress data of Daqing crude oil from the simulation experiment of pipelining,the result of prediction with this model shows that the average relative deviation between the yield stress measured and predicted is 30.27%,and the coefficient of correlation is 0.962 3. 展开更多
关键词 DAQING CRUDE oil pipelining YIELD stress prediction model
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Half Vector Message Pipelining Optimization of Barrier Synchronization Problems
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作者 韩天舒 胡铭曾 +1 位作者 李晓明 丁雪梅 《Journal of Harbin Institute of Technology(New Series)》 EI CAS 1999年第1期50-53,共4页
Communication optimization is very important for imporoving performance of parallel programs A communication optimization method called HVMP(Half Vector Message Ripelining) is presented. In comparison with the widelyu... Communication optimization is very important for imporoving performance of parallel programs A communication optimization method called HVMP(Half Vector Message Ripelining) is presented. In comparison with the widelyused vector message pipelining, HVMP can get better tradeoff between reducing and hiding communication overhead,and eliminate the communication barrier of barrier synchronization problems[1]. For parallel Systems with low bandwidth such as cluster of workstations and barrier synchronization problems with large amount of communication, HVMPmethod can get good performance. 展开更多
关键词 Data parallel BARRIER synchronization communication OPTIMIZATION method HALF VECTOR MESSAGE pipelining
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A parallel-pipelining software process model
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作者 赵鹏 龚鹏 《Journal of Harbin Institute of Technology(New Series)》 EI CAS 2007年第5期646-651,共6页
Software process is a framework for effective and timely delivery of software system. The framework plays a crucial role for software success. However, the development of large-scale software still faces the crisis of... Software process is a framework for effective and timely delivery of software system. The framework plays a crucial role for software success. However, the development of large-scale software still faces the crisis of high risks, low quality, high costs and long cycle time. This paper proposed a three-phase parallel-pipelining software process model for improving speed and productivity, and reducing software costs and risks without sacrificing software quality. In this model, two strategies were presented. One strategy, based on subsystem-cost priority, was used to prevent software development cost wasting and to reduce software complexity as well; the other strategy, used for balancing subsystem complexity, was designed to reduce the software complexity in the later development stages. Moreover, the proposed function-detailed and workload-simplified subsystem pipelining software process model presents much higher parallelity than the concurrent incremental model. Finally, the component-based product line technology not only ensures software quality and further reduces cycle time, software costs, and software risks but also sufficiently and rationally utilizes previous software product resources and enhances the competition ability of software development organizations. 展开更多
关键词 software process improvement parallel pipelining cost priority product line
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A Practical Parallel Algorithm for All-Pair Shortest Path Based on Pipelining
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作者 Hua Wang Ling Tian Chun-Hua Jiang 《Journal of Electronic Science and Technology of China》 2008年第3期329-333,共5页
On the basis of Floyd algorithm with the extended path matrix, a parallel algorithm which resolves all-pair shortest path (APSP) problem on cluster environment is analyzed and designed. Meanwhile, the parallel APSP ... On the basis of Floyd algorithm with the extended path matrix, a parallel algorithm which resolves all-pair shortest path (APSP) problem on cluster environment is analyzed and designed. Meanwhile, the parallel APSP pipelining algorithm makes full use of overlapping technique between computation and communication. Compared with broadcast operation, the parallel algorithm reduces communication cost. This algorithm has been implemented on MPI on PC-cluster. The theoretical analysis and experimental results show that the parallel algorithm is an efficient and scalable algorithm. 展开更多
关键词 All-pair shortest path Floyd algorithm pipelining parallel algorithm
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An adaptive pipelining scheme for H.264/AVC CABAC decoder 被引量:1
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作者 陈杰 Ding Dandan Yu Lu 《High Technology Letters》 EI CAS 2013年第4期391-397,共7页
An adaptive pipelining scheme for H.264/AVC context-based adaptive binary arithmetic coding(CABAC) decoder for high definition(HD) applications is proposed to solve data hazard problems coming from the data dependenci... An adaptive pipelining scheme for H.264/AVC context-based adaptive binary arithmetic coding(CABAC) decoder for high definition(HD) applications is proposed to solve data hazard problems coming from the data dependencies in CABAC decoding process.An efficiency model of CABAC decoding pipeline is derived according to the analysis of a common pipeline.Based on that,several adaptive strategies are provided.The pipelining scheme with these strategies can be adaptive to different types of syntax elements(SEs) and the pipeline will not stall during decoding process when these strategies are adopted.In addition,the decoder proposed can fully support H.264/AVC high4:2:2 profile and the experimental results show that the efficiency of decoder is much higher than other architectures with one engine.Taking both performance and cost into consideration,our design makes a good tradeoff compared with other work and it is sufficient for HD real-time decoding. 展开更多
关键词 H.264/AVC context-based adaptive binary arithmetic coding (CABAC) ADAPTIVE PIPELINE data dependency data hazard
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Performance Evaluation of Pipelining Broadcasting in Multicomputer System
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作者 刘宏伟 李晓明 崔光佐 《Journal of Harbin Institute of Technology(New Series)》 EI CAS 1997年第2期43-48,共6页
Communication overhead is an important factor in massively parallel processing systems and it has a dramatic influence on the performance of systems. If it can be implemented as quickly as possible, then the performan... Communication overhead is an important factor in massively parallel processing systems and it has a dramatic influence on the performance of systems. If it can be implemented as quickly as possible, then the performance of systems can be greatly improved. Based on the TORUS interconnection network, this paper presents the pipelining broadcasting, which reduces the broadcasting delay and improve the performance of systems. 展开更多
关键词 BROADCAST PIPELINE MULTICOMPUTER TORUS network
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RUMINATE METHOD-SOFTWARE PIPELINING ON NESTED LOOPS
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作者 LEI WANG ZHIZHONGTANG and CHIHONG ZHANG(Dept. of Computer Science, Tsinghua Lirnivcrsitg Beijing 100084,P. R. China)(Final: wl,t ang ,zch@est4. dcs. tsinghua.edu. cn) 《Wuhan University Journal of Natural Sciences》 CAS 1996年第Z1期430-436,共7页
This paper offers a new method to solve the problem of software pipelininsr on nested loops. We first introduce our new software pipelininog method. Ruminate Method, which can optimize program with nested loops. We al... This paper offers a new method to solve the problem of software pipelininsr on nested loops. We first introduce our new software pipelininog method. Ruminate Method, which can optimize program with nested loops. We also outline an algorithm to realize it and introduce the hardware support we designed. The performance of Ruminate Method is analyzed at the end of this paper with the aid of our preliminary experimental result. 展开更多
关键词 Instruction-level Parallelism Software Pipeline Ruminate Method Nested Loop.
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A Novel Pipelining Encryption Hardware System with High Throughput and High Integration for 5G
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作者 Yuntao Liu Zesheng Shen +1 位作者 Shuo Fang Yun Wang 《China Communications》 SCIE CSCD 2022年第6期1-10,共10页
This paper presents a ZUC-256 stream cipher algorithm hardware system in order to prevent the advanced security threats for 5 G wireless network.The main innovation of the hardware system is that a six-stage pipeline ... This paper presents a ZUC-256 stream cipher algorithm hardware system in order to prevent the advanced security threats for 5 G wireless network.The main innovation of the hardware system is that a six-stage pipeline scheme comprised of initialization and work stage is employed to enhance the solving speed of the critical logical paths.Moreover,the pipeline scheme adopts a novel optimized hardware structure to fast complete the Mod(231-1)calculation.The function of the hardware system has been validated experimentally in detail.The hardware system shows great superiorities.Compared with the same type system in recent literatures,the logic delay reduces by 47%with an additional hardware resources of only 4 multiplexers,the throughput rate reaches 5.26 Gbps and yields at least 45%better performance,the throughput rate per unit area increases 14.8%.The hardware system provides a faster and safer encryption module for the 5G wireless network. 展开更多
关键词 encryption hardware system for 5G ZUC-256 stream cipher algorithm pipeline scheme throughput rate integration rate
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一种前后台结合的Pipelined ADC校准技术
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作者 薛颜 徐文荣 +2 位作者 于宗光 李琨 李加燊 《半导体技术》 CAS 北大核心 2025年第1期46-54,共9页
针对Pipelined模数转换器(ADC)中采样电容失配和运放增益误差带来的非线性问题,提出了一种前后台结合的Pipelined ADC校准技术。前台校准技术通过对ADC量化结果的余量分析,补偿相应流水级的量化结果,后台校准技术基于伪随机(PN)注入的方... 针对Pipelined模数转换器(ADC)中采样电容失配和运放增益误差带来的非线性问题,提出了一种前后台结合的Pipelined ADC校准技术。前台校准技术通过对ADC量化结果的余量分析,补偿相应流水级的量化结果,后台校准技术基于伪随机(PN)注入的方式,利用PN的统计特性校准增益误差。本校准技术在系统级建模和RTL级电路设计的基础上,实现了现场可编程门阵列(FPGA)验证并成功流片。测试结果显示,在1 GS/s采样速率下,校准精度为14 bit的Pipelined ADC的有效位数从9.30 bit提高到9.99 bit,信噪比提高约4 dB,无杂散动态范围提高9.5 dB,积分非线性(INL)降低约10 LSB。 展开更多
关键词 Pipelined模数转换器(ADC) 电容失配 增益误差 前台校准 后台校准
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PED结合弹簧圈栓塞治疗椎动脉破裂夹层动脉瘤1例
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作者 孙新国 李菲 +3 位作者 赵洪婷 谷新东 翟秀云 刘洪恩 《中国临床神经外科杂志》 2025年第4期247-250,共4页
椎动脉夹层动脉瘤临床少见,破裂风险高、致残率高、病死率高。椎动脉夹层动脉瘤一旦破裂出血,需积极手术治疗。该部位动脉瘤显微手术困难,单纯支架辅助弹簧圈栓塞复发率高。本文报道1例40岁男性,因右侧桡骨骨折切开复位固定术后1 d突发... 椎动脉夹层动脉瘤临床少见,破裂风险高、致残率高、病死率高。椎动脉夹层动脉瘤一旦破裂出血,需积极手术治疗。该部位动脉瘤显微手术困难,单纯支架辅助弹簧圈栓塞复发率高。本文报道1例40岁男性,因右侧桡骨骨折切开复位固定术后1 d突发头痛并晕厥1 h由滨州市人民医院骨科转入神经外科,急诊颅脑CT显示蛛网膜下腔出血(主要位于脑桥延髓前外侧),头颈CTA及脑血管造影证实右侧椎动脉夹层动脉瘤,采用Pipeline血流导向装置(PED)结合弹簧圈栓塞治疗,术后即刻造影显示动脉瘤破口处不显影,右侧椎动脉、右侧小脑后下动脉、右侧小脑下前动脉血流通畅,支架贴壁良好。术后半年,复查造影未见动脉瘤复发。虽然目前使用PED治疗椎动脉破裂夹层动脉瘤存在争议,但某些特定病例,为防止动脉瘤再次破裂出血,采用PED结合弹簧圈栓塞治疗是一种有效的、可行的治疗手段。 展开更多
关键词 椎动脉夹层动脉瘤 破裂动脉瘤 血管内治疗 Pipeline血流导向装置 弹簧圈
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Vibration safety assessment and parameter analysis of buried oil pipelines based on vibration isolation holes under strong surface impact 被引量:1
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作者 Wang Guobo Mei Hua +4 位作者 Wang Jianning He Wei Yin Yao Zhai Yuxin Zuo Pengfei 《Earthquake Engineering and Engineering Vibration》 2025年第1期69-82,共14页
Strong surface impact will produce strong vibration,which will pose a threat to the safety of nearby buried pipelines and other important lifeline projects.Based on the verified numerical method,a comprehensive numeri... Strong surface impact will produce strong vibration,which will pose a threat to the safety of nearby buried pipelines and other important lifeline projects.Based on the verified numerical method,a comprehensive numerical parameter analysis is conducted on the key influencing factors of the vibration isolation hole(VIH),which include hole diameter,hole net spacing,hole depth,hole number,hole arrangement,and soil parameters.The results indicate that a smaller ratio of net spacing to hole diameter,the deeper the hole,the multi-row hole,the hole adoption of staggered arrangements,and better site soil conditions can enhance the efficiency of the VIH barrier.The average maximum vibration reduction efficiency within the vibration isolation area can reach 42.2%.The vibration safety of adjacent oil pipelines during a dynamic compaction projection was evaluated according to existing standards,and the measurement of the VIH was recommended to reduce excessive vibration.The single-row vibration isolation scheme and three-row staggered arrangement with the same hole parameters are suggested according to different cases.The research findings can serve as a reference for the vibration safety analysis,assessment,and control of adjacent underground facilities under the influence of strong surface impact loads. 展开更多
关键词 vibration isolation hole buried oil pipeline strong surface impact vibration velocity vibration safety assessment
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四川大学大模型底层系统方向研究论文在VLDB 2025发表
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《信息网络安全》 北大核心 2025年第9期1475-1475,共1页
四川大学计算机学院学生团队在大规模语言模型参数高效微调系统研究方向取得重要进展,其研究成果“mLoRA:Fine-Tuning LoRA Adapters via Highly-Efficient Pipeline Parallelism in Multiple GPUs”在国际数据库学术会议VLDB 2025 Rese... 四川大学计算机学院学生团队在大规模语言模型参数高效微调系统研究方向取得重要进展,其研究成果“mLoRA:Fine-Tuning LoRA Adapters via Highly-Efficient Pipeline Parallelism in Multiple GPUs”在国际数据库学术会议VLDB 2025 Research Track正式发表。VLDB(International Conference on Very Large Data Bases)是数据库领域的重要国际学术会议之一,涵盖数据库管理系统、数据密集型系统与大规模数据处理等方向。该工作已在多个国内外互联网企业的实际生产环境中部署应用,并获得一项中国发明专利和一项美国发明专利的受理。 展开更多
关键词 LoRA Adapters Fine-Tuning mLoRA Pipeline Parallelism
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Trace Software Pipelining
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作者 王剑 AndreasKrall 《Journal of Computer Science & Technology》 SCIE EI CSCD 1995年第6期481-490,共10页
Global software pipelining is a complex but efficient compilation technique to exploit instruction-level parallelism for loops with branches. This paper presents a novel global software pipelining technique, called Th... Global software pipelining is a complex but efficient compilation technique to exploit instruction-level parallelism for loops with branches. This paper presents a novel global software pipelining technique, called Thace Software Pipelining,targeted to the instruction-level parallel processors such as Very Long Instruc-tion Word (VLIW) and superscalar machines. Thace software pipelining applies a global code scheduling technique to compact the original loop body. The re-sulting loop is called a trace software pipelined (TSP) code. The trace softwrae pipelined code can be directly executed with special architectural support or call be transformed into a globally software pipelined loop for the current VLIW and superscalar processors. Thus, exploiting parallelism across all iterations of a loop can be completed through compacting the original loop body with any global code scheduling technique. This makes our new technique very promis-ing in practical compilers. Finally, we also present the preliminary experimental results to support our new approach. 展开更多
关键词 Instruction-level parallelism fine-grain parallelism software pipelining loop scheduling Very Long Instruction Word (VLIW) superscalar processor
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State-of-the-art and knowledge gaps in gaseous hydrogen pipelines:from the perspective of materials,design,and integrity management
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作者 Zhengli HUA Ruizhe GAO +4 位作者 Baihui XING Juan SHANG Jinyang ZHENG Wenzhu PENG Yiming ZHAO 《Journal of Zhejiang University-Science A(Applied Physics & Engineering)》 2025年第2期87-108,共22页
Widespread use of green hydrogen is a critical route to achieving a carbon-neutral society,but it cannot be accomplished without extensive hydrogen distribution.Hydrogen pipelines are the most energy-efficient approac... Widespread use of green hydrogen is a critical route to achieving a carbon-neutral society,but it cannot be accomplished without extensive hydrogen distribution.Hydrogen pipelines are the most energy-efficient approach to transporting hydrogen in areas with high,long-term demand for hydrogen.A well-known fact is that the properties of hydrogen differ from those of natural gas,which leads to significant variations in the pipeline transportation process.In addition,hydrogen can degrade the mechanical properties of steels,thereby affecting pipeline integrity.This situation has led to two inevitable key challenges in the current development of hydrogen-pipeline technology:economic viability and safety.Based on a review of the current state of hydrogen pipelines,including material compatibility with hydrogen,design methods,process operations,safety monitoring,and standards,this paper highlights key knowledge gaps in gaseous hydrogen pipelines.These gaps include the utilisation of high-strength materials for hydrogen pipelines,design of high-quality hydrogen pipelines,determination of hydrogen velocity,and repurposing of existing natural-gas pipelines.This review aims to identify the challenges in current hydrogen pipelines development and provide valuable suggestions for future research. 展开更多
关键词 Hydrogen pipelines Hydrogen embrittlement STANDARDS Pipeline design Hydrogen velocity
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DyPipe: A Holistic Approach to Accelerating Dynamic Neural Networks with Dynamic Pipelining
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作者 庄毅敏 胡杏 +1 位作者 陈小兵 支天 《Journal of Computer Science & Technology》 SCIE EI CSCD 2023年第4期899-910,共12页
Dynamic neural network(NN)techniques are increasingly important because they facilitate deep learning techniques with more complex network architectures.However,existing studies,which predominantly optimize the static... Dynamic neural network(NN)techniques are increasingly important because they facilitate deep learning techniques with more complex network architectures.However,existing studies,which predominantly optimize the static computational graphs by static scheduling methods,usually focus on optimizing static neural networks in deep neural network(DNN)accelerators.We analyze the execution process of dynamic neural networks and observe that dynamic features introduce challenges for efficient scheduling and pipelining in existing DNN accelerators.We propose DyPipe,a holistic approach to optimizing dynamic neural network inferences in enhanced DNN accelerators.DyPipe achieves significant performance improvements for dynamic neural networks while it introduces negligible overhead for static neural networks.Our evaluation demonstrates that DyPipe achieves 1.7x speedup on dynamic neural networks and maintains more than 96%performance for static neural networks. 展开更多
关键词 dynamic neural network(NN) deep neural network(DNN)accelerator dynamic pipelining
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Seismic response analysis of buried pipelines with varying stiffness by shaking table tests
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作者 Chen Hongyu Cui Jie +3 位作者 Li Yadong Ouyang Zhiyong Huang Xiangyun Shan Yi 《Earthquake Engineering and Engineering Vibration》 2025年第2期583-594,共12页
The relative stiffness between underground structures and surrounding soil may significantly influence the dynamic response of such structures.In this study,two underground pipelines were fabricated using rubber joint... The relative stiffness between underground structures and surrounding soil may significantly influence the dynamic response of such structures.In this study,two underground pipelines were fabricated using rubber joints with varying stiffness,and the corresponding dynamic response was evaluated.Model soils were prepared based on similarity ratios.Next,reduced-scale shaking table tests were conducted to investigate the impact of circular underground structures with varying stiffness joints on the amplification of ground acceleration,dynamic response,and deformation patterns of the underground pipelines.The comparative analysis showed that structures with lower stiffness exert less constraint on the surrounding soil,resulting in a higher amplification factor of ground acceleration.The seismic response of less stiff structures is generally 1.1 to 1.3 times the response of the stiffer structures.Therefore,the seismic response of the variable stiffness pipeline exhibits pronounced characteristics.Rubber joints effectively reduce the seismic response of underground structures,demonstrating favorable isolation effects.Consequently,relative stiffness plays a crucial role in the seismic design of underground structures,and the use of rubber materials in underground structures is advantageous. 展开更多
关键词 shaking table test underground pipeline variable stiffness joint pipeline seismic response
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A coarse-grained reconfigurable computing architecture with loop self-pipelining
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作者 DOU Yong WU GuiMing XU dinHui ZHOU XingMing 《Science in China(Series F)》 2009年第4期575-587,共13页
Reconfigurable computing tries to achieve the balance between high efficiency of custom computing and flexibility of general-purpose computing. This paper presents the implementation techniques in LEAP, a coarse-grain... Reconfigurable computing tries to achieve the balance between high efficiency of custom computing and flexibility of general-purpose computing. This paper presents the implementation techniques in LEAP, a coarse-grained reconfigurable array, and proposes a speculative execution mechanism for dynamic loop scheduling with the goal of one iteration per cycle and implementation techniques to support decoupling synchronization between the token generator and the collector. This paper also in- troduces the techniques of exploiting both data dependences of intra- and inter-iteration, with the help of two instructions for special data reuses in the loop-carried dependences. The experimental results show that the number of memory accesses reaches on average 3% of an RISC processor simulator with no memory optimization. In a practical image matching application, LEAP architecture achieves about 34 times of speedup in execution cycles, compared with general-purpose processors. 展开更多
关键词 reconfigurable computing loop pipelining data driven register promotion
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Experimental and Numerical Study on Vortex-Induced Vibration Suppression by Helical Strakes on Subsea Pipelines
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作者 Jinhong Yu Chen An +3 位作者 Yu Zhang Junkai Feng Zexin Xu Frank Lim 《哈尔滨工程大学学报(英文版)》 2025年第3期580-592,共13页
A numerical simulation analysis is conducted to examine the unsteady hydrodynamic characteristics of vortex-induced vibration(VIV)and the suppression effect of helical strakes on VIV in subsea pipelines.The analysis u... A numerical simulation analysis is conducted to examine the unsteady hydrodynamic characteristics of vortex-induced vibration(VIV)and the suppression effect of helical strakes on VIV in subsea pipelines.The analysis uses the standard k−εturbulence model for 4.5-and 12.75-inch pipes,and its accuracy is verified by comparing the results with large-scale hydrodynamic experiments.These experiments are designed to evaluate the suppression efficiency of VIV with and without helical strakes,focusing on displacement and drag coefficients under different flow conditions.Furthermore,the influence of important geometric parameters of the helical strakes on drag coefficients and VIV suppression efficiency at different flow rates is compared and discussed.Numerical results agree well with experimental data for drag coefficient and vortex shedding frequency.Spring-pipe self-excited vibration experimental tests reveal that the installation of helical strakes substantially reduces the drag coefficient of VIV within a certain flow rate range,achieving suppression efficiencies exceeding 90%with strake heights larger than 0.15D.Notably,the optimized parameter combination of helical strakes,with a pitch of 15D,a fin height of 0.2D,and 45°edge slopes,maintains high suppression efficiency,thereby exhibiting superior performance.This study provides a valuable reference for the design and application of helical strakes and VIV suppression in subsea engineering. 展开更多
关键词 Subsea pipeline Helical strakes Vortex-induced vibration Lift-drag coefficient SUPPRESSION
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