By complementing the equivalent oxide thickness （EOT） of a 1.7nm nitride/oxynitride （N/O） stack gate dielectric （EOT- 1.7nm） with a W/TiN metal gate electrode,metal gate CMOS devices with sub-100nm gate length a...By complementing the equivalent oxide thickness （EOT） of a 1.7nm nitride/oxynitride （N/O） stack gate dielectric （EOT- 1.7nm） with a W/TiN metal gate electrode,metal gate CMOS devices with sub-100nm gate length are fabricated in China for the first time. The key technologies adopted to restrain SCE and to improve drive ability include a 1.7nm N/O stack gate dielectric, non-CMP planarization technology, a T-type refractory W/TiN metal stack gate electrode, and a novel super steep retrograde channel doping using heavy ion implantation and a double sidewall scheme. Using these optimized key technologies, high performance 95nm metal gate CMOS devices with excellent SCE and good driving ability are fabricated. Under power supply voltages of VDS ± 1.5V and VGS± 1.8V,drive currents of 679μA/μm for nMOS and - 327μA/μm for pMOS are obtained. A subthreshold slope of 84.46mV/dec, DIBL of 34.76mV/V, and Vth of 0.26V for nMOS, and a subthreshold slope of 107.4mV/dec,DIBL of 54.46mV/V, and Vth of 0.27V for pMOS are achieved. These results show that the combined technology has indeed thoroughly eliminated the boron penetration phenomenon and polysilicon depletion effect ,effectively reduced gate tunneling leakage, and improved device reliability.展开更多
The effect of a non-ionic surfactant on particles removal in post-CMP cleaning was investigated. By changing the concentration of the non-ionic surfactant, a series of experiments were performed on the 12 inch Cu patt...The effect of a non-ionic surfactant on particles removal in post-CMP cleaning was investigated. By changing the concentration of the non-ionic surfactant, a series of experiments were performed on the 12 inch Cu pattern wafers in order to determine the best cleaning results. Then the effect of the surfactant on the reduction of defects and the removal of particles was discussed in this paper. What is more, the negative effect of a non-ionic surfactant was also discussed. Based on the experiment results, it is concluded that the non-ionic surfactant could cause good and ill effects at different concentrations in the post-CMP cleaning process. This understanding will serve as a guide to how much surfactant should be added in order to achieve excellent cleaning performance.展开更多
Material removal mechanism under non-contact condition between the pad and the wafer in the chemical mechanical polishing (CMP) process is investigated. Based on the assumption that almost all effective material remov...Material removal mechanism under non-contact condition between the pad and the wafer in the chemical mechanical polishing (CMP) process is investigated. Based on the assumption that almost all effective material removals take place due to the active abrasives which cut material through the plowing effects. A novel model is developed to predict the material removal rate (MRR) under non-contact condition between the pad and the wafer in CMP. Validated by the experimental data, the model is proved to be able to predict the change of MRR under non-contact condition. Numerical simulation of the model shows: the relative velocity u between the pad and the wafer and fluid viscosity η are the most important factors which impact MRR under non-contact condition; load changes of wafer also affects the MRR, but the effect is not as obvious as the relative velocity and fluid viscosity; when the radius of abrasive is not less than 50nm, the impact of MRR alone with the changes in the size of the abrasive can be ignored.展开更多
For improving the polishing performance, in this article, the roles of a nonionic surfactant（Fatty alcohol polyoxyethylene ether） and H2O2 were investigated in the chemical mechanical planarization process, respecti...For improving the polishing performance, in this article, the roles of a nonionic surfactant（Fatty alcohol polyoxyethylene ether） and H2O2 were investigated in the chemical mechanical planarization process, respectively.Firstly, the effects of the nonionic surfactant on the within-wafer non-uniformity（WIWNU） and the surface roughness were mainly analyzed. In addition, the passivation ability of the slurry, which had no addition of BTA, was also discussed from the viewpoint of the static etch rate, electrochemical curve and residual step height under different concentrations of H2O2. The experimental results distinctly revealed that the nonionic surfactant introduced in the slurry improved the WIWNU and surface roughness, and that a 2 vol% was considered as an appropriate concentration relatively. When the concentration of H2O2 surpasses 3 vol%, the slurry will possess a relatively preferable passivation ability, which can effectively decrease the step height and contribute to acquiring a flat and smooth surface. Hence, based on the result of these experiments, the influences of the nonionic surfactant and H2O2 are further understood, which means the properties of slurry can be improved.展开更多
文摘By complementing the equivalent oxide thickness （EOT） of a 1.7nm nitride/oxynitride （N/O） stack gate dielectric （EOT- 1.7nm） with a W/TiN metal gate electrode,metal gate CMOS devices with sub-100nm gate length are fabricated in China for the first time. The key technologies adopted to restrain SCE and to improve drive ability include a 1.7nm N/O stack gate dielectric, non-CMP planarization technology, a T-type refractory W/TiN metal stack gate electrode, and a novel super steep retrograde channel doping using heavy ion implantation and a double sidewall scheme. Using these optimized key technologies, high performance 95nm metal gate CMOS devices with excellent SCE and good driving ability are fabricated. Under power supply voltages of VDS ± 1.5V and VGS± 1.8V,drive currents of 679μA/μm for nMOS and - 327μA/μm for pMOS are obtained. A subthreshold slope of 84.46mV/dec, DIBL of 34.76mV/V, and Vth of 0.26V for nMOS, and a subthreshold slope of 107.4mV/dec,DIBL of 54.46mV/V, and Vth of 0.27V for pMOS are achieved. These results show that the combined technology has indeed thoroughly eliminated the boron penetration phenomenon and polysilicon depletion effect ,effectively reduced gate tunneling leakage, and improved device reliability.
基金Project supported by the Specific Project Items No.2 in National Long-Term Technology Development Plan(No.2009zx02308-003)
文摘The effect of a non-ionic surfactant on particles removal in post-CMP cleaning was investigated. By changing the concentration of the non-ionic surfactant, a series of experiments were performed on the 12 inch Cu pattern wafers in order to determine the best cleaning results. Then the effect of the surfactant on the reduction of defects and the removal of particles was discussed in this paper. What is more, the negative effect of a non-ionic surfactant was also discussed. Based on the experiment results, it is concluded that the non-ionic surfactant could cause good and ill effects at different concentrations in the post-CMP cleaning process. This understanding will serve as a guide to how much surfactant should be added in order to achieve excellent cleaning performance.
基金National Natural Science Foundation of China (Grant No. 50705006)
文摘Material removal mechanism under non-contact condition between the pad and the wafer in the chemical mechanical polishing (CMP) process is investigated. Based on the assumption that almost all effective material removals take place due to the active abrasives which cut material through the plowing effects. A novel model is developed to predict the material removal rate (MRR) under non-contact condition between the pad and the wafer in CMP. Validated by the experimental data, the model is proved to be able to predict the change of MRR under non-contact condition. Numerical simulation of the model shows: the relative velocity u between the pad and the wafer and fluid viscosity η are the most important factors which impact MRR under non-contact condition; load changes of wafer also affects the MRR, but the effect is not as obvious as the relative velocity and fluid viscosity; when the radius of abrasive is not less than 50nm, the impact of MRR alone with the changes in the size of the abrasive can be ignored.
基金Project supported by the Special Project Items No.2 in National Long-Term Technology Development Plan,China(No.2009ZX02308)the Hebei Natural Science Foundation of China(No.E2013202247)the Natural Science Foundation of Hebei Province,China(No.E2014202147)
文摘For improving the polishing performance, in this article, the roles of a nonionic surfactant（Fatty alcohol polyoxyethylene ether） and H2O2 were investigated in the chemical mechanical planarization process, respectively.Firstly, the effects of the nonionic surfactant on the within-wafer non-uniformity（WIWNU） and the surface roughness were mainly analyzed. In addition, the passivation ability of the slurry, which had no addition of BTA, was also discussed from the viewpoint of the static etch rate, electrochemical curve and residual step height under different concentrations of H2O2. The experimental results distinctly revealed that the nonionic surfactant introduced in the slurry improved the WIWNU and surface roughness, and that a 2 vol% was considered as an appropriate concentration relatively. When the concentration of H2O2 surpasses 3 vol%, the slurry will possess a relatively preferable passivation ability, which can effectively decrease the step height and contribute to acquiring a flat and smooth surface. Hence, based on the result of these experiments, the influences of the nonionic surfactant and H2O2 are further understood, which means the properties of slurry can be improved.
