Spin logics have emerged as a promising avenue for the development of logic-in-memory architectures.In particular,the realization of XOR spin logic gates using a single spin-orbit torque device shows great potential f...Spin logics have emerged as a promising avenue for the development of logic-in-memory architectures.In particular,the realization of XOR spin logic gates using a single spin-orbit torque device shows great potential for low-power stateful logic circuits in the next generation.In this study,we successfully obtained the XOR logic gate by utilizing a spin-orbit torque device with a lateral interface,which was created by local ion implantation in the Ta/Pt/Co/Ta Hall device exhibiting perpendicular magnetic anisotropy.The angle of the lateral interface is set at 45°relative to the current direction,leading to the competition between symmetry breaking and current-driven Néel-type domain wall motion.Consequently,the field-free magnetic switching reversed is realized by the same sign of current amplitude at this interface.Based on this field-free magnetic switching behavior,we successfully proposed an XOR logic gate that could be implemented using only a single spin-orbit torque Hall device.This study provides a potentially viable approach toward efficient spin logics and in-memory computing architectures.展开更多
Quantum-dot cellular automaton (QCA) is an emerging, promising, future generation nanoelectronic computational architecture that encodes binary information as electronic charge configuration of a cell. It is a digital...Quantum-dot cellular automaton (QCA) is an emerging, promising, future generation nanoelectronic computational architecture that encodes binary information as electronic charge configuration of a cell. It is a digital logic architecture that uses single electrons in arrays of quantum dots to perform binary operations. Fundamental unit in building of QCA circuits is a QCA cell. A QCA cell is an elementary building block which can be used to build basic gates and logic devices in QCA architectures. This paper evaluates the performance of various implementations of QCA based XOR gates and proposes various novel layouts with better performance parameters. We presented the various QCA circuit design methodology for XOR gate. These layouts show less number of crossovers and lesser cell count as compared to the conventional layouts already present in the literature. These design topologies have special functions in communication based circuit applications. They are particularly useful in phase detectors in digital circuits, arithmetic operations and error detection & correction circuits. The comparison of various circuit designs is also given. The proposed designs can be effectively used to realize more complex circuits. The simulations in the present work have been carried out using QCADesigner tool.展开更多
The basic indexes of all-optical integrated photonic circuits include high-density integration,ultrafast response and ultralow energy consumption.Traditional methods mainly adopt conventional micro/nano-structures.The...The basic indexes of all-optical integrated photonic circuits include high-density integration,ultrafast response and ultralow energy consumption.Traditional methods mainly adopt conventional micro/nano-structures.The overall size of the circuit is large,usually reaches hundreds of microns.Besides,it is difficult to balance the ultrafast response and ultra-low energy consumption problem,and the crosstalk between two traditional devices is difficult to overcome.Here,we propose and experimentally demonstrate an approach based on inverse design method to realize a high-density,ultrafast and ultra-low energy consumption integrated photonic circuit with two all-optical switches controlling the input states of an all-optical XOR logic gate.The feature size of the whole circuit is only 2.5μm×7μm,and that of a single device is 2μm×2μm.The distance between two adjacent devices is as small as 1.5μm,within wavelength magnitude scale.Theoretical response time of the circuit is 150 fs,and the threshold energy is within 10 fJ/bit.We have also considered the crosstalk problem.The circuit also realizes a function of identifying two-digit logic signal results.Our work provides a new idea for the design of ultrafast,ultra-low energy consumption all-optical devices and the implementation of high-density photonic integrated circuits.展开更多
All-optical high-speed binary data pattern recognition is one of the key technologies in network security applications. A serial pattern recognition scheme is presented, which can detect and locate a specified random ...All-optical high-speed binary data pattern recognition is one of the key technologies in network security applications. A serial pattern recognition scheme is presented, which can detect and locate a specified random target pattern within an input data sequence at high bit-rate. The logic operation principle is presented using logic equations. The logic AND/XNOR gates and a re- circulating loop at 10.65-42.6Gbit/s are successfully demonstrated using three semiconductor optical amplifier （SOA） based gates. The experiments have successfully demonstrated the random pattern recognition up to 256- bits at 42.6 Gbit/s.展开更多
基金financially supported by the Chinese Academy of Sciences (Nos.XDA18000000 and Y201926)the Youth Innovation Promotion Association of CAS (No.2020118)+1 种基金Beijing Municipal Natural Science Foundation (No.4244071)the Funding Support from Research Grants Council—Early Career Scheme (No.26200520)。
文摘Spin logics have emerged as a promising avenue for the development of logic-in-memory architectures.In particular,the realization of XOR spin logic gates using a single spin-orbit torque device shows great potential for low-power stateful logic circuits in the next generation.In this study,we successfully obtained the XOR logic gate by utilizing a spin-orbit torque device with a lateral interface,which was created by local ion implantation in the Ta/Pt/Co/Ta Hall device exhibiting perpendicular magnetic anisotropy.The angle of the lateral interface is set at 45°relative to the current direction,leading to the competition between symmetry breaking and current-driven Néel-type domain wall motion.Consequently,the field-free magnetic switching reversed is realized by the same sign of current amplitude at this interface.Based on this field-free magnetic switching behavior,we successfully proposed an XOR logic gate that could be implemented using only a single spin-orbit torque Hall device.This study provides a potentially viable approach toward efficient spin logics and in-memory computing architectures.
文摘Quantum-dot cellular automaton (QCA) is an emerging, promising, future generation nanoelectronic computational architecture that encodes binary information as electronic charge configuration of a cell. It is a digital logic architecture that uses single electrons in arrays of quantum dots to perform binary operations. Fundamental unit in building of QCA circuits is a QCA cell. A QCA cell is an elementary building block which can be used to build basic gates and logic devices in QCA architectures. This paper evaluates the performance of various implementations of QCA based XOR gates and proposes various novel layouts with better performance parameters. We presented the various QCA circuit design methodology for XOR gate. These layouts show less number of crossovers and lesser cell count as compared to the conventional layouts already present in the literature. These design topologies have special functions in communication based circuit applications. They are particularly useful in phase detectors in digital circuits, arithmetic operations and error detection & correction circuits. The comparison of various circuit designs is also given. The proposed designs can be effectively used to realize more complex circuits. The simulations in the present work have been carried out using QCADesigner tool.
基金the National Key Research and Development Program of China under Grant No.2018YFB2200403the National Natural Science Foundation of China under Grant Nos.11734001,91950204,92150302.
文摘The basic indexes of all-optical integrated photonic circuits include high-density integration,ultrafast response and ultralow energy consumption.Traditional methods mainly adopt conventional micro/nano-structures.The overall size of the circuit is large,usually reaches hundreds of microns.Besides,it is difficult to balance the ultrafast response and ultra-low energy consumption problem,and the crosstalk between two traditional devices is difficult to overcome.Here,we propose and experimentally demonstrate an approach based on inverse design method to realize a high-density,ultrafast and ultra-low energy consumption integrated photonic circuit with two all-optical switches controlling the input states of an all-optical XOR logic gate.The feature size of the whole circuit is only 2.5μm×7μm,and that of a single device is 2μm×2μm.The distance between two adjacent devices is as small as 1.5μm,within wavelength magnitude scale.Theoretical response time of the circuit is 150 fs,and the threshold energy is within 10 fJ/bit.We have also considered the crosstalk problem.The circuit also realizes a function of identifying two-digit logic signal results.Our work provides a new idea for the design of ultrafast,ultra-low energy consumption all-optical devices and the implementation of high-density photonic integrated circuits.
文摘All-optical high-speed binary data pattern recognition is one of the key technologies in network security applications. A serial pattern recognition scheme is presented, which can detect and locate a specified random target pattern within an input data sequence at high bit-rate. The logic operation principle is presented using logic equations. The logic AND/XNOR gates and a re- circulating loop at 10.65-42.6Gbit/s are successfully demonstrated using three semiconductor optical amplifier （SOA） based gates. The experiments have successfully demonstrated the random pattern recognition up to 256- bits at 42.6 Gbit/s.
