The fabrication of 4H-SiC vertical trench-gate metal-oxide-semiconductor field-effect transistors（UMOSFETs） is reported in this paper.The device has a 15-μm thick drift layer with 3×10^15 cm^-3 N-type doping c...The fabrication of 4H-SiC vertical trench-gate metal-oxide-semiconductor field-effect transistors（UMOSFETs） is reported in this paper.The device has a 15-μm thick drift layer with 3×10^15 cm^-3 N-type doping concentration and a 3.1μm channel length.The measured on-state source-drain current density is 65.4 A/cm^2 at Vg = 40 V and VDS = 15 V.The measured threshold voltage（Vth） is 5.5 V by linear extrapolation from the transfer characteristics.A specific on-resistance（Rsp-on） is 181 mΩ·cm^2 at Vg = 40 V and a blocking voltage（BV） is 880 V（IDS = 100 μA@880V） at Vg = 0 V.展开更多
A novel split-gate power UMOSFET with a variable K dielectric layer is proposed. This device shows a 36.2% reduction in the specific on=state resistance at a breakdown voltage of 115 V, as compared with the SGE-UMOS d...A novel split-gate power UMOSFET with a variable K dielectric layer is proposed. This device shows a 36.2% reduction in the specific on=state resistance at a breakdown voltage of 115 V, as compared with the SGE-UMOS device. Numerical simulation results indicate that the proposed device features high performance with an improved figure of merit of Qg × RON and BV^2/RON, as compared with the previous power UMOSFET.展开更多
研究了一种新型4H-Si C U型槽栅金属氧化物半导体场效应晶体管(UMOSFETs)结构.该结构中的p-body区下方有一p型突出屏蔽区.在关态下,该p型突出屏蔽区能够有效的保护栅氧化层,降低栅氧电场,提高击穿电压.在开态下,该p型屏蔽区并没有对器...研究了一种新型4H-Si C U型槽栅金属氧化物半导体场效应晶体管(UMOSFETs)结构.该结构中的p-body区下方有一p型突出屏蔽区.在关态下,该p型突出屏蔽区能够有效的保护栅氧化层,降低栅氧电场,提高击穿电压.在开态下,该p型屏蔽区并没有对器件的电流产生阻碍作用,并没有带来JFET电阻效应,能够有效的降低器件导通电阻.此外,该结构表面还集成了poly Si/Si C异质结二极管,降低了器件的反向恢复电荷,从而改善器件的反向恢复特性.仿真结果显示,与p+-Si C屏蔽区UMOSFET结构比较,该新结构的特征导通电阻降低了53. 8%,反向恢复电荷减小了57. 1%.展开更多
基金Project supported by the National Natural Science Foundation of China (Grant Nos. 61176070 and 61274079)the Doctoral Fund of Ministry of Education of China (Grant No. 20110203110010)the Key Specific Projects of Ministry of Education of China (Grant No. 625010101)
文摘The fabrication of 4H-SiC vertical trench-gate metal-oxide-semiconductor field-effect transistors（UMOSFETs） is reported in this paper.The device has a 15-μm thick drift layer with 3×10^15 cm^-3 N-type doping concentration and a 3.1μm channel length.The measured on-state source-drain current density is 65.4 A/cm^2 at Vg = 40 V and VDS = 15 V.The measured threshold voltage（Vth） is 5.5 V by linear extrapolation from the transfer characteristics.A specific on-resistance（Rsp-on） is 181 mΩ·cm^2 at Vg = 40 V and a blocking voltage（BV） is 880 V（IDS = 100 μA@880V） at Vg = 0 V.
文摘为了缓解SiC UMOSFET栅底部的电场尖峰问题,优化击穿电压(Breakdown Voltage,BV)和特征导通电阻(Ron,sp)的折中关系,利用Sentaurus TCAD仿真软件研究了一种含高k栅介质层与P型屏蔽区的4H-SiC超结UMOSFET结构(Hk SiC SJ UMOS)。该结构在沟槽底部加入了P型屏蔽层来减小栅电场,采用多次外延生长与高能离子注入的方法引入了上下浓度不同的两段P柱形成超结结构,从而在保持高击穿电压的同时降低了特征导通电阻,此外高k栅介质层的加入可以使电场分布更加均匀,同时增加漂移区表面的电荷量以降低特征导通电阻。仿真结果表明,与传统SiC UMOSFET结构(Conv SiC UMOS)相比,未加入高k介质的SiC超结UMOSFET结构(SiC SJ UMOS)击穿电压提升了23.4%,特征导通电阻下降了14.6%,而加入高k介质层后的结构(Hk SiC SJ UMOS)与传统结构相比击穿电压提高了27.8%,特征导通电阻降低了31.1%,其FoM优值是传统结构的约2.37倍,具有更优良的电学特性。
基金Project supported by the National Natural Science Foundation of China (Grant No. 60906048)the Program for New Century Excellent Talents in University,China (Grant No. NCET-10-0052)the Fundamental Research Funds for the Central Universities,China (Grant No. HEUCFT1008)
文摘A novel split-gate power UMOSFET with a variable K dielectric layer is proposed. This device shows a 36.2% reduction in the specific on=state resistance at a breakdown voltage of 115 V, as compared with the SGE-UMOS device. Numerical simulation results indicate that the proposed device features high performance with an improved figure of merit of Qg × RON and BV^2/RON, as compared with the previous power UMOSFET.
