The readout integrated circuit (ROIC) technology is one of the critical technologies in the research of an infrared focal plane array (IRFPA). Based on the virtual instrument technology, a system for parameter test of...The readout integrated circuit (ROIC) technology is one of the critical technologies in the research of an infrared focal plane array (IRFPA). Based on the virtual instrument technology, a system for parameter test of ROIC is developed for IRFPA. The complex programmable logic device (CPLD) is applied into the system to increase its flexibility. With high reliability and precision, along with the integrated software and hardware environment, the system can test all kinds of ROICs.展开更多
Current mirror integration（CMI） read out integrated circuit（ROIC） topology provides a low input impedance to photo-detectors and provides large injection efficiency, large charge handling capacity and snapshot mod...Current mirror integration（CMI） read out integrated circuit（ROIC） topology provides a low input impedance to photo-detectors and provides large injection efficiency, large charge handling capacity and snapshot mode operation without in-pixel opamps. The ROIC described in this paper has been implemented with a modified current mirror circuit, with matched PMOS pairs for detector input stage and its biasing. The readout circuit has been designed for 30×30μm^2 pixel size, 4×4 array size, variable frame rate, 5 Me charga pixel per second（Mpps）.Experimental performance of the test chip has achieved 15 Me charge handling capacity, a high dynamic range of83 dB, 99.8% linearity and 99.96% injection efficiency. The ROIC design has been fabricated in 3.3 V 1P6 MUMC180 nm CMOS process and tested up to 5 MHz pixel rate at room and at cryogenic temperature.展开更多
文摘The readout integrated circuit (ROIC) technology is one of the critical technologies in the research of an infrared focal plane array (IRFPA). Based on the virtual instrument technology, a system for parameter test of ROIC is developed for IRFPA. The complex programmable logic device (CPLD) is applied into the system to increase its flexibility. With high reliability and precision, along with the integrated software and hardware environment, the system can test all kinds of ROICs.
基金the support extended by Shri Tapan Mishra, Director, Space Applications Centre, Ahmedabad, IndiaSensor Development Area, Space Applications Centre, Ahmedabad, India for their support
文摘Current mirror integration（CMI） read out integrated circuit（ROIC） topology provides a low input impedance to photo-detectors and provides large injection efficiency, large charge handling capacity and snapshot mode operation without in-pixel opamps. The ROIC described in this paper has been implemented with a modified current mirror circuit, with matched PMOS pairs for detector input stage and its biasing. The readout circuit has been designed for 30×30μm^2 pixel size, 4×4 array size, variable frame rate, 5 Me charga pixel per second（Mpps）.Experimental performance of the test chip has achieved 15 Me charge handling capacity, a high dynamic range of83 dB, 99.8% linearity and 99.96% injection efficiency. The ROIC design has been fabricated in 3.3 V 1P6 MUMC180 nm CMOS process and tested up to 5 MHz pixel rate at room and at cryogenic temperature.
