RSA public key crypto system is a relatively safe technology, which is widely used in today’s secure electronic communication. In this paper, a new implementation method to optimize a 1 024 bit RSA processor was pres...RSA public key crypto system is a relatively safe technology, which is widely used in today’s secure electronic communication. In this paper, a new implementation method to optimize a 1 024 bit RSA processor was presented. Basically, a fast modular multiplication architecture based on Montgomery’s algorithm was proposed. Modular exponentiation algorithm scans encryption from right to left, so two modular multiplications can be processed parallel. The new architecture is also fit for an effective I/O interface. The time to calculate a modular exponentiation is about n 2 clock cycles. The proposed architecture has a data rate of 93.7 kb/s for 1 024 bit work with a 100 MHz clock.展开更多
In order to make the typical Montgomery’s algorithm suitable for implementation on FPGA, a modified version is proposed and then a high-performance systolic linear array architecture is designed for RSA cryptosystem ...In order to make the typical Montgomery’s algorithm suitable for implementation on FPGA, a modified version is proposed and then a high-performance systolic linear array architecture is designed for RSA cryptosystem on the basis of the optimized algorithm. The proposed systolic array architecture has dis- tinctive features, i.e. not only the computation speed is significantly fast but also the hardware overhead is drastically decreased. As a major practical result, the paper shows that it is possible to implement public-key cryptosystem at secure bit lengths on a single commercially available FPGA.展开更多
基金NSF of U nited States under Contract 5 978East Asia and Pacific Program(960 2 485 )
文摘RSA public key crypto system is a relatively safe technology, which is widely used in today’s secure electronic communication. In this paper, a new implementation method to optimize a 1 024 bit RSA processor was presented. Basically, a fast modular multiplication architecture based on Montgomery’s algorithm was proposed. Modular exponentiation algorithm scans encryption from right to left, so two modular multiplications can be processed parallel. The new architecture is also fit for an effective I/O interface. The time to calculate a modular exponentiation is about n 2 clock cycles. The proposed architecture has a data rate of 93.7 kb/s for 1 024 bit work with a 100 MHz clock.
文摘In order to make the typical Montgomery’s algorithm suitable for implementation on FPGA, a modified version is proposed and then a high-performance systolic linear array architecture is designed for RSA cryptosystem on the basis of the optimized algorithm. The proposed systolic array architecture has dis- tinctive features, i.e. not only the computation speed is significantly fast but also the hardware overhead is drastically decreased. As a major practical result, the paper shows that it is possible to implement public-key cryptosystem at secure bit lengths on a single commercially available FPGA.
