Bilayer MoS2 is a promising channel candidate for extending Moore’s law,owing to its optimal channel thickness and improved suppression of extrinsic scattering compared to monolayers.However,its intrinsic phonon-limi...Bilayer MoS2 is a promising channel candidate for extending Moore’s law,owing to its optimal channel thickness and improved suppression of extrinsic scattering compared to monolayers.However,its intrinsic phonon-limited electron mobility is severely limited by enhanced K–Q intervalley scattering arising from the multivalley conduction band feature inherent to the bilayer structure.To overcome this bottleneck,we propose a“valley separation engineering”strategy that combines a twist angle near 30°with applied stress.Our first-principles calculations demonstrate that although valley separation can be continuously increased using this strategy,the electron mobility saturates at∼200 cm^(2)⋅V^(−1)⋅s^(−1).The saturation is attributed to the competition between the reduced effective mass and enhanced intravalley scattering induced by phonon softening once the detrimental intervalley scattering is effectively suppressed by sufficient valley separation.This study establishes a theoretical upper limit for the intrinsic electron transport of bilayer MoS2 masked by severe intervalley scattering.展开更多
Heterojunction and morphology control assume a significant part in adjusting the intrinsic electromagnetic properties of absorbers to acquire outstanding microwave absorption(MA)performance,but this still faces huge c...Heterojunction and morphology control assume a significant part in adjusting the intrinsic electromagnetic properties of absorbers to acquire outstanding microwave absorption(MA)performance,but this still faces huge challenges.Herein,FeS_(2)/C/MoS_(2)composite with core–shell structure was successfully designed and prepared via a multi-interface engineering.MoS_(2)nanosheets with 1T and 2H phases are coated on the outside of FeS_(2)/C to form a porous interconnected structure that can optimize the impedance matching characteristics and strengthen the interfacial polarization loss capacity.Remarkably,as-fabricated FCM-3 harvests a broad effective absorption bandwidth(EAB)of 5.12 GHz and a minimum reflection loss(RL_(min))value of-45.1 d B.Meanwhile,FCM-3 can accomplish a greatest radar cross section(RCS)reduction value of 18.52 d B m^(2)when the detection angle is 0°.Thus,the convenient computer simulation technology(CST)simulations and encouraging accomplishments provide a novel avenue for the further development of efficient and lightweight MA materials.展开更多
本文提出了一种低功耗全MOS电压基准源设计,利用MOS管在亚阈值区的温度特性,降低了功耗并满足低电压、宽温度范围的需求。传统的带隙基准源由于采用双极管和电阻,无法满足低功耗应用的要求,因此,本文设计了一种全MOS管的基准电压源,通...本文提出了一种低功耗全MOS电压基准源设计,利用MOS管在亚阈值区的温度特性,降低了功耗并满足低电压、宽温度范围的需求。传统的带隙基准源由于采用双极管和电阻,无法满足低功耗应用的要求,因此,本文设计了一种全MOS管的基准电压源,通过优化电路结构和工作原理,实现了低静态功耗、较宽的工作温度范围和较低的温度系数。仿真结果显示,在−55℃到150℃的温度范围内,输出电压变化仅为2.03 mV,温度系数为16.5 × 10⁻⁶/℃,静态电流为5.7 μA,功耗为6.84 μW,PSRR为−59.16 dB。该设计在低功耗、低电压应用中具有显著优势,适用于物联网、可穿戴设备等对功耗要求较高的场合。This paper proposes a low-power all-MOS voltage reference design that utilizes the temperature characteristics of MOS transistors operating in the subthreshold region to achieve low power consumption while meeting the requirements of low voltage and wide temperature range. Traditional bandgap reference circuits, which rely on bipolar junction transistors and resistors, fail to satisfy the demands of low-power applications. Therefore, this design adopts an all-MOS voltage reference structure. By optimizing the circuit architecture and operational principles, the design achieves low static power consumption, a wide operating temperature range, and a low temperature coefficient. Simulation results show that within the temperature range of −55˚C to 150˚C, the output voltage variation is only 2.03 mV, with a temperature coefficient of 16.5×10⁻⁶/˚C. The static current is 5.7 μA, power consumption is 6.84 μW, and the power supply rejection ratio (PSRR) is −59.16 dB. This design demonstrates significant advantages in low-power, low-voltage applications, making it suitable for use in IoT devices, wearable electronics, and other scenarios with stringent power consumption requirements.展开更多
基金supported by the National Key R&D Program of China (Grant No.2022YFA1402503)the High Performance Computing Center of Jilin University,China。
文摘Bilayer MoS2 is a promising channel candidate for extending Moore’s law,owing to its optimal channel thickness and improved suppression of extrinsic scattering compared to monolayers.However,its intrinsic phonon-limited electron mobility is severely limited by enhanced K–Q intervalley scattering arising from the multivalley conduction band feature inherent to the bilayer structure.To overcome this bottleneck,we propose a“valley separation engineering”strategy that combines a twist angle near 30°with applied stress.Our first-principles calculations demonstrate that although valley separation can be continuously increased using this strategy,the electron mobility saturates at∼200 cm^(2)⋅V^(−1)⋅s^(−1).The saturation is attributed to the competition between the reduced effective mass and enhanced intravalley scattering induced by phonon softening once the detrimental intervalley scattering is effectively suppressed by sufficient valley separation.This study establishes a theoretical upper limit for the intrinsic electron transport of bilayer MoS2 masked by severe intervalley scattering.
基金financially supported by the National Natural Science Foundation of China(Nos.52402354,62174016 and 12374394)China Postdoctoral Science Foundation(Nos.2023M740471)the Natural Science Foundation of Jiangsu Higher Education Institutions(Nos.24KJB430002)。
文摘Heterojunction and morphology control assume a significant part in adjusting the intrinsic electromagnetic properties of absorbers to acquire outstanding microwave absorption(MA)performance,but this still faces huge challenges.Herein,FeS_(2)/C/MoS_(2)composite with core–shell structure was successfully designed and prepared via a multi-interface engineering.MoS_(2)nanosheets with 1T and 2H phases are coated on the outside of FeS_(2)/C to form a porous interconnected structure that can optimize the impedance matching characteristics and strengthen the interfacial polarization loss capacity.Remarkably,as-fabricated FCM-3 harvests a broad effective absorption bandwidth(EAB)of 5.12 GHz and a minimum reflection loss(RL_(min))value of-45.1 d B.Meanwhile,FCM-3 can accomplish a greatest radar cross section(RCS)reduction value of 18.52 d B m^(2)when the detection angle is 0°.Thus,the convenient computer simulation technology(CST)simulations and encouraging accomplishments provide a novel avenue for the further development of efficient and lightweight MA materials.
文摘本文提出了一种低功耗全MOS电压基准源设计,利用MOS管在亚阈值区的温度特性,降低了功耗并满足低电压、宽温度范围的需求。传统的带隙基准源由于采用双极管和电阻,无法满足低功耗应用的要求,因此,本文设计了一种全MOS管的基准电压源,通过优化电路结构和工作原理,实现了低静态功耗、较宽的工作温度范围和较低的温度系数。仿真结果显示,在−55℃到150℃的温度范围内,输出电压变化仅为2.03 mV,温度系数为16.5 × 10⁻⁶/℃,静态电流为5.7 μA,功耗为6.84 μW,PSRR为−59.16 dB。该设计在低功耗、低电压应用中具有显著优势,适用于物联网、可穿戴设备等对功耗要求较高的场合。This paper proposes a low-power all-MOS voltage reference design that utilizes the temperature characteristics of MOS transistors operating in the subthreshold region to achieve low power consumption while meeting the requirements of low voltage and wide temperature range. Traditional bandgap reference circuits, which rely on bipolar junction transistors and resistors, fail to satisfy the demands of low-power applications. Therefore, this design adopts an all-MOS voltage reference structure. By optimizing the circuit architecture and operational principles, the design achieves low static power consumption, a wide operating temperature range, and a low temperature coefficient. Simulation results show that within the temperature range of −55˚C to 150˚C, the output voltage variation is only 2.03 mV, with a temperature coefficient of 16.5×10⁻⁶/˚C. The static current is 5.7 μA, power consumption is 6.84 μW, and the power supply rejection ratio (PSRR) is −59.16 dB. This design demonstrates significant advantages in low-power, low-voltage applications, making it suitable for use in IoT devices, wearable electronics, and other scenarios with stringent power consumption requirements.
