采用脉冲激光技术(PLD)在p+-Si上沉积了(Pb,Sr)Nb2O6-Na Nb O3介质薄膜,介质薄膜在氧化气氛下进行不同温度的热处理,进行光刻图形化、磁控溅射沉积电极之后,形成Al/p+-Si/(Pb,Sr)Nb2O6-Na Nb O3/Au结构的MIM(金属-绝缘体-金属)电容器。...采用脉冲激光技术(PLD)在p+-Si上沉积了(Pb,Sr)Nb2O6-Na Nb O3介质薄膜,介质薄膜在氧化气氛下进行不同温度的热处理,进行光刻图形化、磁控溅射沉积电极之后,形成Al/p+-Si/(Pb,Sr)Nb2O6-Na Nb O3/Au结构的MIM(金属-绝缘体-金属)电容器。通过X射线衍射(XRD)、原子力显微镜(AFM)和高分辨透射电子显微镜(HRTEM)对介质薄膜的微观形貌及结构进行分析。通过测试不同温度热处理后薄膜电容器的I-V和C-V电学特性,研究了不同温度热处理对薄膜电容器漏电流密度、电容、介电损耗及物相的影响,并对电容器电容和损耗的偏压特性进行了分析,结果表明,800℃热处理能显著提高薄膜的介电常数并降低漏电流密度。在偏压为-1 V,频率为1 k Hz的测试环境下,其介电常数为33,漏电流密度约为4.104×10-9A·cm-2,满足微电子领域内对漏电流小于1×10-8A·cm-2的要求;对薄膜电容器特性曲线拟合后得到其二次项电压系数为188,符合国际半导体技术蓝图(ITRS)对未来MIM电容提出的要求,具有良好的应用前景,是制备无机薄膜电容器理想的介质材料。展开更多
Trichloroethylene （TCE） pretreatment of Si surface prior to HfO2 deposition is employed to fabricate HfO2 gatedielectric MOS capacitors. Influence of this processing procedure on interlayer growth, HfO2/Si interface...Trichloroethylene （TCE） pretreatment of Si surface prior to HfO2 deposition is employed to fabricate HfO2 gatedielectric MOS capacitors. Influence of this processing procedure on interlayer growth, HfO2/Si interface properties, gate-oxide leakage and device reliability is investigated. Among the surface pretreatments in NH3, NO, N2O and TCE ambients, the TCE pretreatment gives the least interlayer growths the lowest interface-state density, the smallest gate leakage and the highest reliability. All these improvements should be ascribed to the passivation effects of Cl2 and HC1 on the structural defects in the interlayer and at the interface, and also their gettering effects on the ion contamination in the gate dielectric.展开更多
文摘采用脉冲激光技术(PLD)在p+-Si上沉积了(Pb,Sr)Nb2O6-Na Nb O3介质薄膜,介质薄膜在氧化气氛下进行不同温度的热处理,进行光刻图形化、磁控溅射沉积电极之后,形成Al/p+-Si/(Pb,Sr)Nb2O6-Na Nb O3/Au结构的MIM(金属-绝缘体-金属)电容器。通过X射线衍射(XRD)、原子力显微镜(AFM)和高分辨透射电子显微镜(HRTEM)对介质薄膜的微观形貌及结构进行分析。通过测试不同温度热处理后薄膜电容器的I-V和C-V电学特性,研究了不同温度热处理对薄膜电容器漏电流密度、电容、介电损耗及物相的影响,并对电容器电容和损耗的偏压特性进行了分析,结果表明,800℃热处理能显著提高薄膜的介电常数并降低漏电流密度。在偏压为-1 V,频率为1 k Hz的测试环境下,其介电常数为33,漏电流密度约为4.104×10-9A·cm-2,满足微电子领域内对漏电流小于1×10-8A·cm-2的要求;对薄膜电容器特性曲线拟合后得到其二次项电压系数为188,符合国际半导体技术蓝图(ITRS)对未来MIM电容提出的要求,具有良好的应用前景,是制备无机薄膜电容器理想的介质材料。
基金Project supported by the National Natural Science Foundation of China （Grant No 60376019）.
文摘Trichloroethylene （TCE） pretreatment of Si surface prior to HfO2 deposition is employed to fabricate HfO2 gatedielectric MOS capacitors. Influence of this processing procedure on interlayer growth, HfO2/Si interface properties, gate-oxide leakage and device reliability is investigated. Among the surface pretreatments in NH3, NO, N2O and TCE ambients, the TCE pretreatment gives the least interlayer growths the lowest interface-state density, the smallest gate leakage and the highest reliability. All these improvements should be ascribed to the passivation effects of Cl2 and HC1 on the structural defects in the interlayer and at the interface, and also their gettering effects on the ion contamination in the gate dielectric.
