摘要
研究了对流水线模数转换器级间增益误差进行补偿的数字域自校正算法,提出了一种适用于数字域自校正的改进的流水线结构.该结构通过对参考电压的调整,避免了以往自校正结构中产生丢失码字、降低输入范围的现象.结果表明,校正后系统的线性度有了大幅度的提升.
A new digitally self-calibration algorithm was investigated to compensate interstage gain errors in pipeline analog digital converter (ADC). An improved pipeline ADC structure was introduced which is more adapted to the digital self-calibration algorithm. Missing code and missing decision levels can be eliminated by adjusting reference voltage, and the effect of non-linearity is apparently improved.
出处
《上海交通大学学报》
EI
CAS
CSCD
北大核心
2004年第5期738-742,746,共6页
Journal of Shanghai Jiaotong University
关键词
流水线模数转换器
数字域自校正
线性度
pipeline analog digital converter (ADC)
digital calibration
linearity