摘要
高低压兼容工艺对LDMOSFET漂移区的各参数设计提出了更高的要求。结合实际工艺,对LDMOSFET漂移区的长度、结深、浓度等进行了灵敏度分析,详细分析了各参数对击穿电压和导通电阻的影响。根据分析结果,提出了一种改进方案。模拟结果表明,此方案可以使器件击穿电压提高27%,导通电阻降低10%以上。
In the high/low voltage compatible LDMOS process, it is more difficult to design drift region parameters of LDMOSFET's. The sensitivity of drift region parameters of LDMOSFET's, such as the drift region length, junction depth, concentration, etc., has been analyzed. Effects of each parameter on the breakdown voltage and on-resistance are discussed. Based on the analysis, an improved structure of drift region with a p-buffer is developed. Results from simulation show that the proposed structure can improve the breakdown voltage by 27% and reduce the on-resistance by 10%.
出处
《微电子学》
CAS
CSCD
北大核心
2004年第2期198-202,共5页
Microelectronics
基金
国家高技术研究发展计划(863计划)资助项目(2002AA1Z1550)
