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一维离散小波变换的VLSI设计 被引量:3

VLSI Architecture for1-D Discrete Wavelet Transform
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摘要 文章提出了一种离散小波变换的VLSI结构。这种结构由四部分构成:输入延迟单元、寄存器单元、滤波器单元和控制单元。该结构采用了递归金字塔算法(RPA)取代传统的PA算法。只用一组滤波器即可完成所有级别的小波运算。同时,结合Short-LengthFIR技术,以减少乘法和加法的运算次数。在寄存器单元的设计上,采用了LifetimeAnalysis技术,结合Forward-BackwardRegisterAllocation(FBRA)方法,使寄存器的数目降至最低。 This paper presents a VLSI implementation of discrete wavelet transform(DWT).It comprises of four basic unit:input delay,filter,register bank,and control unit.The proposed architecture adopt recursive pyramid algorithm(RPA)instead of the classical pyramid algorithm(PA),only one low-pass filter and high-pass filter are required to compute all levels.In addition,the architecture is combined with the short-length FIR filter algorithms to reduce the number of multiplications and additions.At the same time,the number of registers in the architecture is minimized by the use of lifetime analysis technique and forward-backward register allocation scheme(FBRA).
作者 雷焱 何怡刚
机构地区 湖南大学
出处 《微电子学与计算机》 CSCD 北大核心 2004年第2期48-50,54,共4页 Microelectronics & Computer
基金 国家自然科学基金项目(50277010) 湖南大学撷英计划资助
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同被引文献13

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