摘要
本文主要阐述了基于并口EPP协议的软件加密卡的硬件设计。根据实践经验,重点介绍了器件选型与EPP并口时序关键点等注意事项。具有较强的实践意义。
In this paper, the author deals with the design of hardware card for secrecy based on parallel port EPP protocol. Drawing on his own experimental experience, the author also places emphasis on the know-how in choosing components and the aspects to be taken into special account in EPP parallel port timing cycle. The issues dealt with in this paper have definite practical significance.
出处
《长沙航空职业技术学院学报》
2003年第4期47-48,共2页
Journal of Changsha Aeronautical Vocational and Technical College
