摘要
本文从集成电路CAD/CAM发展的角度,阐述了门阵列设计的特点。结合具体的电路设计,本文系统地论述了从逻辑输入到逻辑模拟与时间验证、版面设计与自动布局布线、版图数据的自动生成与转换等完整的门阵列自动设计过程。同时,给出了建立基片(母片)、宏单元符号库、模拟功能库以及建立宏单元描述的基本思想和方法,从而形成了门阵列正向设计的整体过程。对各设计部分的数据库文件,本文都作了详细介绍,并提供了所设计电路的逻辑图、输入输出波形图和物理实现输入逻辑的版图(Layout)。
In this paper, the characteristics of gate array design is elaborated from the development of IC's CAD/CAM. For the design of a specific circuit, the procedure of gate array automatic design which involves schematic entry, simulation, time verification, automatic placement and routing, as well as layout data generation and its conversion has been developed systematically. The basic idea and the way have been given, in which the base slice and macrocell library of gate array are established and described. Thus, the process of gate array automatic design is formed. All database files in each step are classified in detail. Logic diagram and waveform output and layout that realizes physically logic schematics for the circuit are supplied.
出处
《计算机辅助设计与图形学学报》
EI
CSCD
1989年第1期21-26,共6页
Journal of Computer-Aided Design & Computer Graphics
