摘要
文中提出一种高速任意码的设计方案。采用微处理器控制的可编程码预置,码型暂存于高速RAM中。输出时,在时钟控制下反复读出,再经两次复合,可高速输出预置的码型。
In this paper, indicates a designing scheme on high speed programmable random code is indicated. In this scheme, the process of initializing of the programmable code is under the control of a microprocessor, while the process of reading out is obtained by the ECL RAM. After the complex of two strings of programmahle code for the first time and the second time, high speed programmable random code is obtained at the output point.
出处
《电子测量技术》
2003年第1期21-21,24,共2页
Electronic Measurement Technology
关键词
可编程
任意码
预置存储
复合
码型
high speed programmable random code the complex
