摘要
介绍了一种基于 CPLD(复杂可编程逻辑器件 )和 FIFO(先入先出存储器 )的多通道高速 A/ D数据采集系统的设计方法 ,并给出了这种数据采集方法的硬件原理电路和主要的软件设计思路。采用该设计方法所设计的数据采集系统不但可以实现高速采集多通道的数据 ,而且还可以扩展模拟量的输入通道数。
The paper introduces the high-speed multi-channel data acquisition system based on CPLD (Complex Programmable Logic Device) and FIFO (First In First Out) techniques. The hardware principle and software design idea are presented respectively. The data acquisition system can not only acquire data from multiple channels, but also can extend the channels for sampling more data.
出处
《电子工程师》
2003年第2期44-47,共4页
Electronic Engineer
