摘要
报告了研制的 9.6mm栅宽双δ-掺杂功率 PHEMT,在 fo=1 1 .2 GHz、Vds=8.5 V时该器件输出功率3 7.2 8d Bm,功率增益 9.5 d B,功率附加效率 44.7% ,在 Vds=5～ 9V的范围内 ,该器件的功率附加效率均大于42 % ,两芯片合成 ,在 1 0 .5～ 1 1 .3 GHz范围内 ,输出功率大于 3 9.92 d Bm,最大功率达到 40 .3 7d Bm,功率增益大于 9.9d B,典型的功率附加效率 40 %。
The developed double δ-doped power PHEMT with 9.6 mm gate periphery delivers 37.28 dBm output power with 9.5 dB power gain and 44.7% power added efficiency (PAE) at 11.2 GHz with V ds =8.5 V. The device works with PAE more than 42% when the V ds varies between 5～9 V. The combination of two chips demonstrates output power more than 39.92 dBm with more than 9.9 dB power gain and 40% typical PAE across the band of 10.5～11.3 GHz and the highest output power reaches 40.37 dBm.
出处
《固体电子学研究与进展》
CAS
CSCD
北大核心
2003年第1期42-44,50,共4页
Research & Progress of SSE
