摘要
数字逻辑系统的设计离不开计算机辅助设计CAD工具的帮助 ,尤其是VHDL硬件描述语言。该语言采用模块化的设计方法 ,自顶向下完成全部设计和综合过程 ,最终生成印刷电路板或专用集成电路。论述了高级语言VHDL的行为模块描述和结构模块描述 ,介绍了数字逻辑系统的设计方法和步骤 。
Now, many digital logic systems cannot do without computer aided design CAD,especially the VHDL Hardware Description Language. The language uses this design of modular and a top down design method to complete all design and synthesis process. Finally, printed circuit board or private integrated circuit. This paper describes the behavioral model and structural model of VHDL, design method and procedure of digital logic system,and discusses synthesis process of the VHDL model through a simple example.
出处
《控制工程》
CSCD
2003年第1期76-77,共2页
Control Engineering of China
