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基于稀疏性的矩阵实数化硬件加速设计

Sparsity-Based Hardware Acceleration Scheme of Matrix Realification
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摘要 双射映射(bijective mapping)能够实现二维基于旋转不变子空间的信号参数估计算法(two-dimensional estimating signal parameters via rotational invariance techniques,2D-ESPRIT)的参数自动配对,从而有效降低计算复杂度.在双射映射中,相较于其他部分,矩阵的实数化涉及规模更大、复杂度更高的计算,对系统实时性的影响更大.为优化这一过程,从矩阵的稀疏性出发,对其计算流程进行了深入分析,在FPGA平台上设计并实现了一种由通用与延长流水线构成的矩阵实数化硬件加速系统.实验结果表明:该系统的计算误差控制在1.14×10^(-4)以内;当总阵元数为6、快拍数为32时,该系统仅用时2.62μs完成计算,且达到最大加速比8.17;在不同快拍数和阵元数的情况下,系统的资源消耗保持稳定. Bijective mapping enables automatic parameter pairing in the two-dimensional signal parameters via rotational invariance techniques(2D-ESPRIT)algorithm,thereby effectively reducing computational complexity.Within this process,the matrix realification step,compared to other parts,involves larger-scale and more complex computations,which impose a greater impact on the system’s real-time performance.To optimize this step,this paper conducts an in-depth analysis of the computational flow based on the sparsity of matrices and a hardware acceleration system for matrix realification was designed on an FPGA platform.Experimental results demonstrate that the system integrates general and extended pipelines,achieving a computation error within 1.14×10^(-4).When the number of total array elements and snapshots are 6 and 32,the system finishes computation within 2.62μs,and reaches the maximum speedup of 8.17.Also,its resource usage remains stable across different number of total array elements and snapshots.
作者 王卫江 黄彦杰 蒋荣堃 薛丞博 高巍 任仕伟 WANG Weijiang;HUANG Yanjie;JIANG Rongkun;XUE Chengbo;GAO Wei;REN Shiwei(School of Integrated Circuits and Electronics,Beijing Institute of Technology,Beijing 100081,China)
出处 《北京理工大学学报》 北大核心 2025年第12期1305-1311,共7页 Transactions of Beijing Institute of Technology
基金 重庆市自然科学基金资助项目(cstc2021jcyj-msxmX1096)。
关键词 双射映射 矩阵实数化 现场可编程门阵列(FPGA) bijective mapping matrix realification field programmable gate array(FPGA)
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