摘要
提出了一种基于标准0.18μm互补金属氧化物半导体(Complementary Metal Oxide Semiconductor,CMOS)工艺的射频前端集成电路设计方案,针对全球定位系统(Global Positioning System,GPS)L1和北斗B1双模导航系统的应用需求,提升了低噪声放大器(Low-Noise Amplifier,LNA)与下变频混频器的关键性能指标。在电路架构方面,针对低噪声放大器,创新性地采用感应源退化技术,通过外部电容与栅源电容并联有效降低了噪声系数;而对于下变频混频器模块,则选用了具有结构优势的无源单平衡拓扑,在保证转换增益的同时显著改善了线性度指标并降低了1/f噪声干扰。测试结果显示,该方案在1.8 V电压下实现60 dB链路增益和2 dB噪声系数,整体功耗仅22 mW。系统集成测试中,当输入功率为-100 dBm时,输出中频功率达3.15 dBm。
This paper presents a radio frequency front-end integrated circuit design based on a standard 0.18μm CMOS process,specifically tailored for dual-mode navigation systems supporting GPS L1 and Beidou B1.The design emphasizes optimized key performance metrics for both the low-noise amplifier(LNA)and down-conversion mixer.For the LNA architecture,this study innovatively employs an inductive source degeneration technique,effectively reducing the noise figure by connecting external capacitors in parallel with gate source capacitors.Regarding the down-conversion mixer module,a structurally advantageous passive single-balanced topology is adopted,significantly improving linearity metrics and suppressing 1/f noise interference while maintaining conversion gain.The test results show that the scheme achieves a 60 dB link gain and a 2 dB noise figure at a voltage of 1.8 V,with an overall power consumption of only 22 mW.In the system integration test,when the input power is-100 dBm,the output intermediate frequency power reaches 3.15 dBm.
作者
杨贤成
熊娟
Yang Xiancheng;Xiong Juan(School of Microelectronics,Hubei University,Wuhan 430072,China)
出处
《电子技术应用》
2025年第11期59-64,共6页
Application of Electronic Technique
基金
国家重点研发计划(2024YFC3810805)。
