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基于CPU-FPGA协同架构的VoIP数据加密系统设计与实现

Design and implementation of a VoIP data encryption system based on a CPU-FPGA collaborative architecture
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摘要 针对通信网络飞速发展背景下VoIP面临日益严峻的数据安全风险,提出并实现了一种基于CPU+FPGA软硬件协同处理架构的VoIP数据加密方案,高效集成AES算法,对实时采集的VoIP话音流进行加密处理。搭建专用话音测试环境,采用主观、客观相结合方法对所设计的加密模块在正常工作状态下的性能及通话质量进行全面评估。测试结果表明,该加密方案在保障安全性的同时有效维持了通话质量。 In the context of the rapid development of communication networks and the increasingly severe data security risks faced by VoIP,this paper proposes and implements a VoIP data encryption scheme based on a CPU+FPGA software-hardware collaborative processing architecture.The scheme efficiently integrates the AES algorithm to encrypt real-timely captured VoIP voice streams.A dedicated voice test environment was established,and a combined subjective and objective approach was used to comprehensively evaluate the performance and call quality of the designed encryption module under normal operating conditions.The test results demonstrate that the proposed encryption scheme effectively maintains call quality while ensuring security.
作者 李斌 杨欢 李德阳 杨志明 姬胜凯 Li Bin;Yang Huan;Li Deyang;Yang Zhiming;Ji Shengkai(The 6th Research Institute of China Electronics Corporation,Beijing 100083,China;Unit 96901,Beijing 100094,China)
出处 《网络安全与数据治理》 2025年第10期40-45,共6页 CYBER SECURITY AND DATA GOVERNANCE
关键词 FPGA 软硬件协同 AES VOIP 加密 FPGA hardware/software co-design AES VoIP encryption
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