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P/S网络中闭环仿真系统时序控制方法研究

Research on Sequential Control Method of Closed-loop Simulation System in P/S Network
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摘要 系统级闭环仿真实验中往往有多种仿真模型互联的需求。发布订阅模型(Publish/Subscribe,P/S)作为一种专门为分布式通信设计的网络模型,能够适应系统级闭环仿真的应用场景。本文研究P/S网络的特点,针对仿真实验中对同步与时序控制的要求,提出了一种基于节点的时钟概念,以此为基础设计了一套严格的时序控制方法。 In system-level closed-loop simulation experiments,there is often a need for interconnection among multiple simulation models.The publish/subscribe(P/S)model,designed specifically for distributed communication,can adapt to the application scenarios of system-level closed-loop simulation.This paper investigates the characteristics of the P/S network and proposes a node-based clock concept to address the requirements for synchronization and timing control in simulation experiments.Based on this concept,a set of strict timing control methods is designed.
作者 陶艳 周学思 刘涛 张风玲 田博 TAO Yan;ZHOU Xuesi;LIU Tao;ZHANG Fengling;TIAN Bo(Shanghai Aerospace Electronic Technology Institute,Shanghai 201109)
出处 《软件》 2025年第9期135-137,144,共4页 Software
关键词 DDS 时序控制 仿真 闭环系统 DDS sequential control,simulation closed-loop system
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  • 1高翔,张福新,汤彦,章隆兵,胡伟武,唐志敏.基于龙芯CPU的多核全系统模拟器SimOS-Goodson[J].软件学报,2007,18(4):1047-1055. 被引量:16
  • 2ZHU J, GAJSKI D D. An ultra-fast instruction set simulator[ J]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2002, 10(3): 353 -373.
  • 3BRAUN G, NOHL A, HOFFMANN A, et al. A universal technique for fast and flexible instruction-set architecture simulation[ J]. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2004, 23(12) : 1625 - 1639.
  • 4RESHADI M, MISHRA P, DUTI" N. Instruction set compiled simu- lation: a technique for fast and flexible instruction set simulation [ C]// Proceedings of the 40th Conference on Design Automation. Piscataway: IEEE, 2003:758-763.
  • 5HELMSTETI'ER C, JOLOBOFF V, ZHOU X, et aL Fast instruc- tion set simulation using LLVM-based dynamic translation[ C]// Proceedings of the 2011 International MuhiConferencc of Engineers and Computer Scientists. Berlin: Springer, 2011 : 212 - 216.
  • 6WAGSTAFF H, GOULD M, FRANKE B, et al. Early partial e- valuation in a JIT-compiled, retargetable instruction set simulator generated from a high-level architecture description[ C] // Proceed- ings of the 50th Annual Design Automation Conference. New York: ACM, 2013: 21.
  • 7BOHM I, EDLER von KOCH T J K, KYLE S C, et al. General- ized just-in-time trace compilation using a parallel task farm in a dynamic binary translator[ C]//Proceedings of the ACM SIGPLAN Conference on Programming Language Design and Implementation. New York: ACM, 2011 : 74 - 85.
  • 8HENNESSYJL,PATTERSONDA.计算机体系结构:量化研究方法[M].3版.郑纬民,汤志忠,汪东升,译.北京:电子工业出版社,2004:31.
  • 9喻之斌,金海,邹南海.计算机体系结构软件模拟技术[J].软件学报,2008,19(4):1051-1068. 被引量:24
  • 10王颖,王赛宇.IA指令集仿真器的优化设计与实现[J].无线电工程,2008,38(11):49-51. 被引量:3

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