摘要
设计并实现了基于国产化高速AD/DA器件的高密度、高速数据吞吐、功耗可调的单收单发射频信号收发链路模块。集成JESD204B高速数据接口、12位高速射频ADC、16位高速射频DAC、超宽带采样保持电路、高性能时钟发生器、电源管理电路。该模块化子系统拓展接口形式为FMC接口,SPI端口可配置收发系统工作模式及功耗调节,电源管理电路可控制上电时序,JESD204B接口实现高速数据交互。试验结果表明,模拟输入通道采样速率达2.6 GSPS,输入带宽达6 GHz,信噪比SNR可达56 dBFS,无杂散动态范围SFDR可达69 dBFS;模拟输出最大转换速率达6.4 GSPS,无杂散动态范围SFDR可达78 dBFS。
Designed and implemented a high-density,high-speed data throughput,and adjustable power consumption RF signal transceiver module,based on Localized AD/DA devices.Integrated JESD204B high-speed data interface,12 bit high-speed RF ADC,16 bit high-speed RF DAC,ultra wide⁃band sampling and holding circuit,high-performance clock generator,and power management circuit.The modular subsystem extends its interface in the form of an FMC interface.The SPI port can be configured for the working mode of the transmitting and receiving system,and the power management circuit can control the power on timing.The JESD204B interface enables high-speed data exchange.The experimental results show that the sampling rate of the analog input channel reaches 2.6 GSPS,input bandwidth up to 6 GHz.The signal-to-noise ratio(SNR)can reach 56 dBFS,and the non spurious dynamic range(SFDR)can reach 69 dBFS;The maximum conversion rate of analog output reaches 6.4 GSPS,and the SFDR without spurious dynamic range can reach 78 dBFS.
作者
温显超
康成蓥
李静
龙路阳
刘军
刘璐
俞宙
王健安
WEN Xianchao;KANG Chengying;LI Jing;LONG Luyang;LIU Jun;LIU Lu;YU Zhou;WANG Jian’an(Chongqing GigaChip Technology Co.,Ltd.Chongqing 400060,China)
出处
《微处理机》
2025年第4期47-52,共6页
Microprocessors
