摘要
随着特征尺寸减小且制造工艺复杂,制造缺陷潜在发生率增加的问题日益突出。针对制造时标准单元内出现的开路缺陷所导致小延迟难以检测到的问题,提出了一种基于不平衡电路的标准单元内缺陷测试电路及方法,利用开路缺陷在不平衡电路中的表征差异,造成不平衡电路新产生一个脉冲,后经过脉冲放大电路对脉冲进行放大,造成脉冲数目的变化,从脉冲数目变化能够反映开路缺陷影响程度的大小。该方法能够有效地检测到标准单元内的弱缺陷。在ISCAS'89基准电路的仿真实验表明,相较于现有方法,提出的方法在具有开销优势的情况下,能够有效地检测到标准单元内最小为40 kΩ的开路缺陷。
As the feature sizes reduce and manufacturing processes become increasingly complex,the issue of raising the possible incidence of manufacturing faults is getting greater attention.In this study,we present a novel circuit and method for testing the faults within a standard cell based on an unbalanced circuit.This helps in detecting the minor delays induced by open-circuit defects that develop within a standard cell during fabrication.The proposed technique generates a new pulse in the unbalanced circuit by exploiting the difference in the difference in the representation of open-circuit flaws in the circuit.This new pulse is then amplified using a pulse amplifier circuit,thereby varying the number of pulses in the unbalanced circuit.The degree of influence of the open-circuit flaws can be determined by the variation in the number of pulses.The proposed technique can be used to detect minor flaws in a typical cell.We compare the proposed approach to those presented in previous studies.With the benefit of overhead,simulation studies conducted on the ISCAS'89 benchmark circuit demonstrate the effectiveness of the proposed method in detecting open-circuit flaws as low as 40 kΩwithin the standard cell.
作者
胡杰文
梁华国
鲍善鑫
章宏
邵志伟
鲁迎春
HU Jiewen;LIANG Huaguo;Bao Shanxin;ZHANG Hong;LU Yingchun(School of Microelectronics,Hefei University of Technology,Hefei 230601,P.R.China)
出处
《微电子学》
北大核心
2025年第2期222-228,共7页
Microelectronics
基金
国家自然科学基金重大科研仪器研制项目(62027815)
安徽省研究生教育教学改革研究重点项目(2022jyjxggyj053)
教育部产学研合作协同育人项目(220802455302758)。
