摘要
目前,由于导弹系统的不断发展,导致飞行过程中所要记录的数据越来越多,为满足弹载记录仪的数据存储要求,现针对弹载记录仪的数据压缩展开研究。通过对LZ4压缩算法的数据帧格式以及匹配方式进行改进,再利用FPGA并行处理数据的特点设计并行化实时压缩处理器。该压缩处理器在FPGA上搭建,无需额外的数据缓存芯片,保证弹载记录仪轻量化的需求。实验结果表明,该处理器接收、处理数据位宽为8 bit,在200 MHz的工作频率下,能够实现1.60 Gbit/s的数据吞吐量,平均压缩比达到了1.82,可以有效实现弹载记录仪的实时压缩,为导弹后续的评估、分析和改进提供可靠的保障。
With the continuous development of missile systems,the amount of data to be recorded du-ring flight has increased significantly.In order to meet the data storage requirements of missile-borne recorders,data compression of missile-borne recorders was studied.The data frame format and the matching method of LZ4 compression algorithm were improveds,and a parallel real-time compression processor was designed based on the FPGA parallel data processing.The compression processor was built on FPGA without additional data cache chips and satisfied with lightweight requirements of missile-borne recorders.Experimental results show that the processor can receive and handle data with a bit width of 8 bits,can achieve a data throughput of 1.60 Gbps at a oparating frequency of 200 MHz and an average compression ratio is 1.82.It can effectively realize the real-time compression of missile-borne recorders and provide reliable support for subsequent missile evaluation,analysis and improvement.
作者
赵瑜婕
李杰
张德彪
冯凯强
张春兴
ZHAO Yujie;LI Jie;ZHANG Debiao;FENG Kaiqiang;ZHANG Chunxing(State Key Laboratory of Dynamic Measurement Technology,North University of China,Taiyuan 030051,Shanxi,China;Key Laboratory of Instrument Science and Dynamic Measurement,Ministry of Education,North University of China,Taiyuan 030051,Shanxi,China)
出处
《火炮发射与控制学报》
北大核心
2025年第3期76-81,共6页
Journal of Gun Launch & Control
基金
自然科学研究面上项目(202303021221114)
山西省基础研究基金(202103021224186)。
关键词
弹载记录仪
FPGA
LZ4压缩算法
并行化实时压缩
missile-borne recorder
FPGA
LZ4 compression algorithm
parallel real-time compression
