摘要
印制电路板和载板的线路形成工艺主要有减成法、半加成法与全加成法三种工艺技术,其中在载板行业广泛应用的半加成法又分为半加成法(SAP)和改良型半加成法(mSAP)。2017年,PCB行业开始引入改良型半加成法(mSAP),使最小线宽/线距30μm/30μm的类载板实现了大规模量产。由于mSAP工艺制作30μm/30μm成本较高,近年来各大厂商纷纷开发35μm/35μm及30μm/30μm精细线路的减成法工艺。减成法也分两种,即酸蚀法和图形电镀碱蚀法,本文仅讨论酸蚀法。当线路精细到50μm以下时,线宽/线距的等级划分是以5μm为一个等级,即:50μm/50μm、45μm/45μm、40μm/40μm、35μm/35μm、30μm/30μm。线宽/线距每降低5μm,对应的工艺控制和采用的物料都会有所不同。本文主要研究如何使用减成法工艺制作30μm/30μm精细线路,通过对铜箔类型,干膜厚度及解析度,曝光分辨率,蚀刻均匀性及蚀刻参数,铜厚控制等一系列影响因素进行研究及提升,得出制作30μm/30μm精细线路的物料设备选择方案及加工参数。
The line formation processes for printed circuit boards(PCBs)and substrates mainly include three types of technologies:subtractive,semi-additive,and full additive.Among these,the semi-additive process,which is widely used in the substrate industry,is further divided into Semi-Additive Process(SAP)and Modified Semi-Additive Process(mSAP).In 2017,the PCB industry began to introduce the Modified Semi-Additive Process(mSAP),enabling the mass production of substrate-like boards with a minimum line width/spacing of 30μm/30μm.Due to the high cost of producing 30μm/30μm lines with mSAP,various manufacturers have recently developed subtractive processes for fine lines of 35μm/35μm and 30μm/30μm.Subtractive processes are also divided into two types:acid etching and pattern plating alkaline etching.This article only discusses the acid etching method.When the line fineness is below 50μm,the line width/spacing is graded in increments of 5μm,i.e.,50μm/50μm,45μm/45μm,40μm/40μm,35μm/35μm,30μm/30μm.For every 5μm reduction in line width/spacing,the corresponding process control and materials used will differ.This article primarily investigates how to use subtractive processes to create fine lines of 30μm/30μm,by studying and improving a series of influencing factors such as copper foil type,dry film thickness and resolution,exposure resolution,etching uniformity,etching parameter,and copper thickness control.The goal is to derive a material and equipment selection plan and processing parameters for producing fine lines of 30μm/30μm.
作者
许伟锚
谢丹伟
陈华丽
Xu Weimao;Xie Danwei;Chen Huali
出处
《印制电路信息》
2025年第S1期7-16,共10页
Printed Circuit Information
