摘要
为了满足高速率、大吞吐量的数据传输需求,设计了一种可应用于I/O组的高性能低压差分信号(Lowvoltage differential signal, LVDS)驱动器。LVDS驱动器由偏置电路和驱动电路两部分构成。其中偏置电路可同时为多个驱动电路提供偏置信号,便于I/O组集成设计,提高了同组LVDS驱动器的一致性,并且偏置电路在传统LVDS驱动器结构的基础上,加入共模反馈电路,减小了工艺、电压、温度对输出共模电压的影响,提高了稳定性。驱动电路与偏置电路结构和尺寸相同,但无共模反馈。LVDS驱动器采用16 nm标准CMOS工艺设计。测试结果表明,该驱动器的传输速率为2 Gb/s,输出差分信号摆幅为0.35 V,共模电压为1.25 V。
In order to meet the high rate and large throughput data transmission,a high-perfor-mance low-voltage differential signal(LVDS)driver was designed for I/O group.LVDS driver con-sisted of two parts,including bias and driver circuit.Bias circuit could provide bias signal to multiple driver circuits at the same time,which was convenient for I/O group integrated and improved the con-sistency of LVDS drivers in the same I/O group.The bias circuit based on traditional structure LVDS driver which added a common mode feedback(CMFB)could reduce the influence of process,temper-ature,voltage on the output common-mode voltage and improve the stability.The driver was the same as the bias in structure and size but without CMFB.The LVDS driver was designed by 16 nm standard CMOS process.The test results show that the transmission rate of the driver is 2 Gb/s,the output differential signal swing is 0.35 V,and the common-mode voltage is 1.25 V.
作者
张胜广
徐玉婷
曹正州
刘国柱
ZHANG Shengguang;XU Yuting;CAO Zhengzhou;LIU Guozhu(Wuxi Esiontech Co.,Ltd.,Wuxi,Jiangsu,214035,CHN;China Key System&Integrated Co.,Ltd.,Wuxi,Jiangsu,214035,CHN)
出处
《固体电子学研究与进展》
CAS
2024年第4期325-330,共6页
Research & Progress of SSE
基金
国家自然科学基金面上项目(62174150)
江苏省自然科学基金面上项目(BK20211040)。
关键词
低压差分信号
驱动器
共模反馈
I/O组
low-voltage differential signal
driver
common mode feedback
I/O group
