摘要
Critical path tracing,a fault simulation method for gate-level combinational circuits,is extended to theparallel critical path tracing for functional block-level combinational circuits.If the word length of the hostcomputer is m,then the parallel critical path tracing will be approximately m times faster than the originalone.
Critical path tracing,a fault simulation method for gate-level combinational circuits,is extended to the parallel critical path tracing for functional block-level combinational circuits.If the word length of the host computer is m,then the parallel critical path tracing will be approximately m times faster than the original one.
基金
The project is supported by the National Natural Science Foundation of China.
