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一种用于背板传输的6.25 Gbps均衡和预加重电路设计

Design of a 6.25Gbps Equalizer and Pre-emphasis Circuit for Backplane Transmission
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摘要 利用0.35μm SiGe BICMOS工艺,设计了一种接收均衡和发送预加重电路。均衡部分采用2级级联的连续时间线性均衡器,补偿由于传输通道损耗带入的信号高频分量衰减。预加重部分采用了一种新型的开关电容式,电流注入结构进行比特位预加重,对高频信号进行预补偿,以降低由于信道衰减造成的ISI。测试结果显示该电路速率范围可达DC^6.25Gbps,均衡器最大可补偿-14dB@3.125GHz的信号衰减,驱动器输出预加重比例为6dB。 A receiver equalization and transmitter pre-emphasis circuit was designed in a 0.35μm SiGe BICMOS technology.A two-stage continuous time linear equalizer was introduced to compensate the attenuation of high frequency signal components caused by channel loss.With a novel switched-capacitor and current injection pre-emphasis circuit,high frequency signal components was pre-compensated to reduce inter-symbol interference caused by channel loss.Lab measurements show that the data rate range of the circuit is DC-6.25 Gbps,the equalizer provides 14 dB gain boost at 3.125 GHz,and the transmitter provides 6 dB pre-emphasis level.
出处 《固体电子学研究与进展》 CSCD 北大核心 2017年第6期410-413,共4页 Research & Progress of SSE
关键词 码间干扰 连续时间线性均衡器 预加重 高速传输 ISI continuous time linear equalizer(CTLE) pre-emphasis high speed transmission
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