摘要
为减少引脚数,降低封装成本和尺寸,简化系统设计,电子器件工程联合委员会提出了一种高速串行接口协议JESD204B.文中呈现了该接口收发机控制器的具体实现方案,并且基于Xilinx的现场可编程门阵列中的高速串行收发器GTH,在6.25Gbit/s的数据速率下完成了4个通道的JESD204B接口收发机控制器的验证.
In order to reduce the pin count, the cost and size of packaging, and complexity of system design, a high speed serial interface protocol named JESD204B has been proposed by the JEDEC committee. This paper presents a specific implementation scheme of the transceiver controller based on this protocol. The implemented controller of the transceiver with 4 lanes has been verified with the high speed serial transceiver Xilinx FPGA GTH under a data rate of 6.25 Gbit/s.
出处
《西安电子科技大学学报》
EI
CAS
CSCD
北大核心
2017年第4期69-74,共6页
Journal of Xidian University
基金
国家自然科学基金资助项目(61504103
61574103
61574105)
关键词
JESD204B实现
高速串行传输
现场可编程门阵列
转换器
数据采集系统设计
implementation of JESD204B
high speed serial data transmission
field programmable gataarray
converter
design of data acquisition system
