摘要
为加快加密算法芯片的设计周期,提出了一种基于FPGA的设计验证平台,即将加密算法用FPGA加以实现,并利用数码显示直观观测结果,以验证设计的正确性。以DES算法为例,详细论述了该平台的系统结构,控制原理以及加密算法的设计验证过程。实验结果表明,该FPGA设计验证平台不仅缩短了加密算法的硬件开发开发周期,还为加密算法的开发提供了灵活性和实用性。
A validation platform based on FPGA is put forward for shorter implementation cycle of encryption algorithm chip. The encryption algorithm is implemented in FPGA. The cipher texts can be observed with digital display circuits. The implementation example of DES Encryption algorithm is given. The system architecture, control principle of this validation platform and the implementation of DES algorithm are descripted. It is shown that the implementation cycle of encryption algorithm is shortened on this FPGA validation platform. The reliability, practicability and feasibility for encryption algorithm implementation are also guaranteed on this platform.
出处
《电子科技》
2017年第6期21-23,共3页
Electronic Science and Technology
关键词
加密算法
FPGA
验证平台
encryption algorithm
FPGA
verification platform
