摘要
分析了HDB3编译码的规则,提出了一种结构简单的在FPGA上实现的HDB3编译码硬件方案,并在QuartusⅡ8.0软件平台上,用VHDL语言实现HDB3编译码器,并进行仿真测试。测试结果表明本设计的正确性和有效性,可以很好的应用于数字通信系统中。
This paper analyzes the principle of HDB3 Codec,and presents a hardware program of HDB3 Codec with simple structure,which implemented on FPGA.And the HDB3 Codec was designed and tested with VHDL on the Quartus Ⅱ8.0.The results show that the design was correct and validity and the HDB3 Codec can be used in digital communication system.
出处
《电子质量》
2015年第7期63-65,共3页
Electronics Quality
