摘要
为满足卫星相机视频处理电路的测试需求,针对一款新型高性能模拟前端,提出了一种可行的CCD数据采集处理方法,以Xilinx公司FPGA为核心,采用VHDL语言实现FPGA的逻辑设计,通过FPGA输出满足A/D的工作时序信号,利用RS232接口接收上位机指令实现不同种类CCD信号的选择输出,验证这款A/D在相关双采样(CDS)模式下的工作情况.最终将处理后的数据输出到Camera Link接口,观察图像数据。测试结果表明本系统具有很好的通用性和灵活性,能够满足多种星载相机视频处理电路的测试需求。
In order to satisfy the needs for testing the video processing circuit of satellite cameras, this paper puts forward a feasible processing method to collect CCD data for a new type of high performance Analog Front End. This method applies VHDL to complete the logic design for FPGA with the core of FPGA from Xilinx Company, meets the timing requirements of ADC by the output of FPGA, receives the commands from host computer to complete the output of different types of CCD signals by RS232 interface, and verify the working conditions of the Analog Front End in CDS mode. Finally, puts the processed data to the Camera Link interface so as to observe the image data. The testing results show that the system has a great generality and flexibility which can satisfy the testing requirements of a variety of spaceborne cameras.
出处
《电子测量技术》
2014年第8期112-116,共5页
Electronic Measurement Technology
