摘要
本文讨论了双极模拟IC的版图与线路图的同一性验证 ,即LVS :(LayoutVersusSchemat ic) ,给出了运行流程图和判别验证完成的方法 。
The verification of bipolar analog IC with LVS is discussed in the paper. Both the flowchart to run LVS and the method to decide if the verification is finished are also given, and several simple examples are included.
出处
《微电子技术》
2002年第4期46-48,共3页
Microelectronic Technology
